{"id":819182,"url":"http://patchwork.ozlabs.org/api/patches/819182/?format=json","web_url":"http://patchwork.ozlabs.org/project/devicetree-bindings/patch/20170927140345.5537-4-alexandre.belloni@free-electrons.com/","project":{"id":37,"url":"http://patchwork.ozlabs.org/api/projects/37/?format=json","name":"Devicetree Bindings","link_name":"devicetree-bindings","list_id":"devicetree.vger.kernel.org","list_email":"devicetree@vger.kernel.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170927140345.5537-4-alexandre.belloni@free-electrons.com>","list_archive_url":null,"date":"2017-09-27T14:03:42","name":"[v2,3/6] dt-bindings: rtc: Add sirf,prima2-sysrtc bindings","commit_ref":null,"pull_url":null,"state":"accepted","archived":true,"hash":"05ba369a5d3e193eff9d8da1703e75a440826fa1","submitter":{"id":26276,"url":"http://patchwork.ozlabs.org/api/people/26276/?format=json","name":"Alexandre Belloni","email":"alexandre.belloni@free-electrons.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/devicetree-bindings/patch/20170927140345.5537-4-alexandre.belloni@free-electrons.com/mbox/","series":[{"id":5377,"url":"http://patchwork.ozlabs.org/api/series/5377/?format=json","web_url":"http://patchwork.ozlabs.org/project/devicetree-bindings/list/?series=5377","date":"2017-09-27T14:03:39","name":"dt-bindings: rtc: document existing bindings","version":2,"mbox":"http://patchwork.ozlabs.org/series/5377/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/819182/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/819182/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y2KLL736cz9tXw\n\tfor ;\n\tThu, 28 Sep 2017 00:03:54 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1753057AbdI0ODw (ORCPT\n\t);\n\tWed, 27 Sep 2017 10:03:52 -0400","from mail.free-electrons.com ([62.4.15.54]:38055 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1753126AbdI0ODu (ORCPT\n\t); Wed, 27 Sep 2017 10:03:50 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid 8EFE920901; Wed, 27 Sep 2017 16:03:48 +0200 (CEST)","from localhost (242.171.71.37.rev.sfr.net [37.71.171.242])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id 6488E20892;\n\tWed, 27 Sep 2017 16:03:48 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","From":"Alexandre Belloni ","To":"linux-rtc@vger.kernel.org","Cc":"linux-kernel@vger.kernel.org, Rob Herring ,\n\tdevicetree@vger.kernel.org,\n\tAlexandre Belloni ","Subject":"[PATCH v2 3/6] dt-bindings: rtc: Add sirf,prima2-sysrtc bindings","Date":"Wed, 27 Sep 2017 16:03:42 +0200","Message-Id":"<20170927140345.5537-4-alexandre.belloni@free-electrons.com>","X-Mailer":"git-send-email 2.14.2","In-Reply-To":"<20170927140345.5537-1-alexandre.belloni@free-electrons.com>","References":"<20170927140345.5537-1-alexandre.belloni@free-electrons.com>","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"},"content":"Add device tree bindings for the SiRFSoC Real Time Clock.\n\nSigned-off-by: Alexandre Belloni \n---\n .../devicetree/bindings/rtc/sirf,prima2-sysrtc.txt | 13 +++++++++++++\n 1 file changed, 13 insertions(+)\n create mode 100644 Documentation/devicetree/bindings/rtc/sirf,prima2-sysrtc.txt","diff":"diff --git a/Documentation/devicetree/bindings/rtc/sirf,prima2-sysrtc.txt b/Documentation/devicetree/bindings/rtc/sirf,prima2-sysrtc.txt\nnew file mode 100644\nindex 000000000000..58885b55da21\n--- /dev/null\n+++ b/Documentation/devicetree/bindings/rtc/sirf,prima2-sysrtc.txt\n@@ -0,0 +1,13 @@\n+SiRFSoC Real Time Clock\n+\n+Required properties:\n+- compatible: must be \"sirf,prima2-sysrtc\"\n+- reg: address range of rtc register set.\n+- interrupts: rtc alarm interrupts.\n+\n+Example:\n+\trtc@2000 {\n+\t\tcompatible = \"sirf,prima2-sysrtc\";\n+\t\treg = <0x2000 0x1000>;\n+\t\tinterrupts = <52 53 54>;\n+\t};\n","prefixes":["v2","3/6"]}