{"id":819181,"url":"http://patchwork.ozlabs.org/api/patches/819181/?format=json","web_url":"http://patchwork.ozlabs.org/project/rtc-linux/patch/20170927140345.5537-3-alexandre.belloni@free-electrons.com/","project":{"id":9,"url":"http://patchwork.ozlabs.org/api/projects/9/?format=json","name":"Linux RTC development","link_name":"rtc-linux","list_id":"linux-rtc.vger.kernel.org","list_email":"linux-rtc@vger.kernel.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170927140345.5537-3-alexandre.belloni@free-electrons.com>","list_archive_url":null,"date":"2017-09-27T14:03:41","name":"[v2,2/6] dt-bindings: rtc: add stericsson,coh901331 bindings","commit_ref":null,"pull_url":null,"state":"accepted","archived":false,"hash":"b766f4ebc8cfd0c360977c94d695ada70fdb6f79","submitter":{"id":26276,"url":"http://patchwork.ozlabs.org/api/people/26276/?format=json","name":"Alexandre Belloni","email":"alexandre.belloni@free-electrons.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/rtc-linux/patch/20170927140345.5537-3-alexandre.belloni@free-electrons.com/mbox/","series":[{"id":5376,"url":"http://patchwork.ozlabs.org/api/series/5376/?format=json","web_url":"http://patchwork.ozlabs.org/project/rtc-linux/list/?series=5376","date":"2017-09-27T14:03:39","name":"dt-bindings: rtc: document existing bindings","version":2,"mbox":"http://patchwork.ozlabs.org/series/5376/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/819181/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/819181/checks/","tags":{},"related":[],"headers":{"Return-Path":"<linux-rtc-owner@vger.kernel.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-rtc-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y2KLL1HH5z9tY0\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 28 Sep 2017 00:03:54 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1753132AbdI0ODw (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tWed, 27 Sep 2017 10:03:52 -0400","from mail.free-electrons.com ([62.4.15.54]:38051 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1753123AbdI0ODu (ORCPT\n\t<rfc822; linux-rtc@vger.kernel.org>); Wed, 27 Sep 2017 10:03:50 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid 51014208FA; Wed, 27 Sep 2017 16:03:48 +0200 (CEST)","from localhost (242.171.71.37.rev.sfr.net [37.71.171.242])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id 29B7820892;\n\tWed, 27 Sep 2017 16:03:48 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","From":"Alexandre Belloni <alexandre.belloni@free-electrons.com>","To":"linux-rtc@vger.kernel.org","Cc":"linux-kernel@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,\n\tdevicetree@vger.kernel.org,\n\tAlexandre Belloni <alexandre.belloni@free-electrons.com>","Subject":"[PATCH v2 2/6] dt-bindings: rtc: add stericsson,coh901331 bindings","Date":"Wed, 27 Sep 2017 16:03:41 +0200","Message-Id":"<20170927140345.5537-3-alexandre.belloni@free-electrons.com>","X-Mailer":"git-send-email 2.14.2","In-Reply-To":"<20170927140345.5537-1-alexandre.belloni@free-electrons.com>","References":"<20170927140345.5537-1-alexandre.belloni@free-electrons.com>","Sender":"linux-rtc-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<linux-rtc.vger.kernel.org>","X-Mailing-List":"linux-rtc@vger.kernel.org"},"content":"Add device tree bindings for the ST-Ericsson COH 901 331 Real Time Clock\n\nSigned-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>\nReviewed-by: Linus Walleij <linus.walleij@linaro.org>\nSigned-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>\n---\n .../devicetree/bindings/rtc/stericsson,coh901331.txt    | 17 +++++++++++++++++\n 1 file changed, 17 insertions(+)\n create mode 100644 Documentation/devicetree/bindings/rtc/stericsson,coh901331.txt","diff":"diff --git a/Documentation/devicetree/bindings/rtc/stericsson,coh901331.txt b/Documentation/devicetree/bindings/rtc/stericsson,coh901331.txt\nnew file mode 100644\nindex 000000000000..3ebeb311335f\n--- /dev/null\n+++ b/Documentation/devicetree/bindings/rtc/stericsson,coh901331.txt\n@@ -0,0 +1,17 @@\n+ST-Ericsson COH 901 331 Real Time Clock\n+\n+Required properties:\n+- compatible: must be \"stericsson,coh901331\"\n+- reg: address range of rtc register set.\n+- interrupt-parent: phandle for the interrupt controller.\n+- interrupts: rtc alarm interrupt.\n+- clocks: phandle to the rtc clock source\n+\n+Example:\n+\trtc: rtc@c0017000 {\n+\t\tcompatible = \"stericsson,coh901331\";\n+\t\treg = <0xc0017000 0x1000>;\n+\t\tinterrupt-parent = <&vicb>;\n+\t\tinterrupts = <10>;\n+\t\tclocks = <&rtc_clk>;\n+\t};\n","prefixes":["v2","2/6"]}