{"id":819162,"url":"http://patchwork.ozlabs.org/api/patches/819162/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/1506519893-16509-2-git-send-email-patrice.chotard@st.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1506519893-16509-2-git-send-email-patrice.chotard@st.com>","list_archive_url":null,"date":"2017-09-27T13:44:48","name":"[U-Boot,v1,1/6] serial: stm32x7: cleanup code","commit_ref":"2a52a9527ab404be6f81bacf70a484fe993d7d44","pull_url":null,"state":"accepted","archived":false,"hash":"57e019441d710e3dd7c9f3f552ac92a21ae934ae","submitter":{"id":63958,"url":"http://patchwork.ozlabs.org/api/people/63958/?format=json","name":"Patrice CHOTARD","email":"patrice.chotard@st.com"},"delegate":{"id":3651,"url":"http://patchwork.ozlabs.org/api/users/3651/?format=json","username":"trini","first_name":"Tom","last_name":"Rini","email":"trini@ti.com"},"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/1506519893-16509-2-git-send-email-patrice.chotard@st.com/mbox/","series":[{"id":5372,"url":"http://patchwork.ozlabs.org/api/series/5372/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=5372","date":"2017-09-27T13:44:48","name":"Update stm32x7 serial driver","version":1,"mbox":"http://patchwork.ozlabs.org/series/5372/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/819162/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/819162/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3y2Jwp6m4Xz9sRm\n\tfor ;\n\tWed, 27 Sep 2017 23:45:14 +1000 (AEST)","by lists.denx.de (Postfix, from userid 105)\n\tid AA663C21DDD; Wed, 27 Sep 2017 13:45:09 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id A4631C21C46;\n\tWed, 27 Sep 2017 13:45:06 +0000 (UTC)","by lists.denx.de (Postfix, from userid 105)\n\tid 474EBC21C46; Wed, 27 Sep 2017 13:45:04 +0000 (UTC)","from mx07-00178001.pphosted.com (mx07-00178001.pphosted.com\n\t[62.209.51.94]) by lists.denx.de (Postfix) with ESMTPS id C2186C21C45\n\tfor ; Wed, 27 Sep 2017 13:45:03 +0000 (UTC)","from pps.filterd (m0046037.ppops.net [127.0.0.1])\n\tby mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv8RDiGHJ026686; Wed, 27 Sep 2017 15:45:01 +0200","from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35])\n\tby mx07-00178001.pphosted.com with ESMTP id 2d8chpr9wu-1\n\t(version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT);\n\tWed, 27 Sep 2017 15:45:01 +0200","from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9])\n\tby beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 9C3B538;\n\tWed, 27 Sep 2017 13:45:00 +0000 (GMT)","from Webmail-eu.st.com (sfhdag6node3.st.com [10.75.127.18])\n\tby zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 873B428E7;\n\tWed, 27 Sep 2017 13:45:00 +0000 (GMT)","from localhost (10.75.127.49) by SFHDAG6NODE3.st.com (10.75.127.18)\n\twith Microsoft SMTP Server (TLS) id 15.0.1178.4;\n\tWed, 27 Sep 2017 15:45:00 +0200"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=-0.7 required=5.0 tests=RCVD_IN_DNSWL_LOW\n\tautolearn=unavailable autolearn_force=no version=3.4.0","From":"","To":", , , \n\t","Date":"Wed, 27 Sep 2017 15:44:48 +0200","Message-ID":"<1506519893-16509-2-git-send-email-patrice.chotard@st.com>","X-Mailer":"git-send-email 1.9.1","In-Reply-To":"<1506519893-16509-1-git-send-email-patrice.chotard@st.com>","References":"<1506519893-16509-1-git-send-email-patrice.chotard@st.com>","MIME-Version":"1.0","X-Originating-IP":"[10.75.127.49]","X-ClientProxiedBy":"SFHDAG4NODE3.st.com (10.75.127.12) To SFHDAG6NODE3.st.com\n\t(10.75.127.18)","X-Proofpoint-Virus-Version":"vendor=fsecure engine=2.50.10432:, ,\n\tdefinitions=2017-09-27_03:, , signatures=0","Subject":"[U-Boot] [PATCH v1 1/6] serial: stm32x7: cleanup code","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "},"content":"From: Patrice Chotard \n\nUse BIT() macro and GENMASK() macro\n\nSigned-off-by: Patrice Chotard \nReviewed-by: Vikas Manocha \n---\n drivers/serial/serial_stm32x7.h | 18 +++++++++---------\n 1 file changed, 9 insertions(+), 9 deletions(-)","diff":"diff --git a/drivers/serial/serial_stm32x7.h b/drivers/serial/serial_stm32x7.h\nindex 9fe37af..6d36b74 100644\n--- a/drivers/serial/serial_stm32x7.h\n+++ b/drivers/serial/serial_stm32x7.h\n@@ -28,18 +28,18 @@ struct stm32x7_serial_platdata {\n \tunsigned long int clock_rate;\n };\n \n-#define USART_CR1_OVER8\t\t\t(1 << 15)\n-#define USART_CR1_TE\t\t\t(1 << 3)\n-#define USART_CR1_RE\t\t\t(1 << 2)\n-#define USART_CR1_UE\t\t\t(1 << 0)\n+#define USART_CR1_OVER8\t\t\tBIT(15)\n+#define USART_CR1_TE\t\t\tBIT(3)\n+#define USART_CR1_RE\t\t\tBIT(2)\n+#define USART_CR1_UE\t\t\tBIT(0)\n \n-#define USART_CR3_OVRDIS\t\t(1 << 12)\n+#define USART_CR3_OVRDIS\t\tBIT(12)\n \n-#define USART_SR_FLAG_RXNE\t\t(1 << 5)\n-#define USART_SR_FLAG_TXE\t\t(1 << 7)\n+#define USART_SR_FLAG_RXNE\t\tBIT(5)\n+#define USART_SR_FLAG_TXE\t\tBIT(7)\n \n-#define USART_BRR_F_MASK\t\t0xFF\n+#define USART_BRR_F_MASK\t\tGENMASK(7, 0)\n #define USART_BRR_M_SHIFT\t\t4\n-#define USART_BRR_M_MASK\t\t0xFFF0\n+#define USART_BRR_M_MASK\t\tGENMASK(15, 4)\n \n #endif\n","prefixes":["U-Boot","v1","1/6"]}