{"id":819132,"url":"http://patchwork.ozlabs.org/api/patches/819132/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/1506515969-1472-9-git-send-email-kever.yang@rock-chips.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1506515969-1472-9-git-send-email-kever.yang@rock-chips.com>","list_archive_url":null,"date":"2017-09-27T12:39:29","name":"[U-Boot,8/8] rockchip: rk3128: add sdram driver","commit_ref":null,"pull_url":null,"state":"superseded","archived":false,"hash":"de619ead3dff45ac528c191bb3dca47261f1c47b","submitter":{"id":64532,"url":"http://patchwork.ozlabs.org/api/people/64532/?format=json","name":"Kever Yang","email":"kever.yang@rock-chips.com"},"delegate":{"id":69486,"url":"http://patchwork.ozlabs.org/api/users/69486/?format=json","username":"ptomsich","first_name":"Philipp","last_name":"Tomsich","email":"philipp.tomsich@theobroma-systems.com"},"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/1506515969-1472-9-git-send-email-kever.yang@rock-chips.com/mbox/","series":[{"id":5353,"url":"http://patchwork.ozlabs.org/api/series/5353/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=5353","date":"2017-09-27T12:39:21","name":"rockchip: add new SoC support for RK3128","version":1,"mbox":"http://patchwork.ozlabs.org/series/5353/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/819132/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/819132/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; 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charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "},"content":"RK3128 support up to 2GB DDR3 sdram, one channel, 32bit data width.\n\nThis patch is only used for U-Boot, but not for SPL which will\ncomes later, maybe after we merge all the common code into a common\nfile.\n\nSigned-off-by: Kever Yang \n---\n\n drivers/ram/rockchip/Makefile | 1 +\n drivers/ram/rockchip/sdram_rk3128.c | 60 +++++++++++++++++++++++++++++++++++++\n 2 files changed, 61 insertions(+)\n create mode 100644 drivers/ram/rockchip/sdram_rk3128.c","diff":"diff --git a/drivers/ram/rockchip/Makefile b/drivers/ram/rockchip/Makefile\nindex 45b5fe7..1a1e557 100644\n--- a/drivers/ram/rockchip/Makefile\n+++ b/drivers/ram/rockchip/Makefile\n@@ -5,6 +5,7 @@\n #\n \n obj-$(CONFIG_ROCKCHIP_RK3368) = dmc-rk3368.o\n+obj-$(CONFIG_ROCKCHIP_RK3128) = sdram_rk3128.o\n obj-$(CONFIG_ROCKCHIP_RK3188) = sdram_rk3188.o\n obj-$(CONFIG_ROCKCHIP_RK322X) = sdram_rk322x.o\n obj-$(CONFIG_ROCKCHIP_RK3288) = sdram_rk3288.o\ndiff --git a/drivers/ram/rockchip/sdram_rk3128.c b/drivers/ram/rockchip/sdram_rk3128.c\nnew file mode 100644\nindex 0000000..04ad2bb\n--- /dev/null\n+++ b/drivers/ram/rockchip/sdram_rk3128.c\n@@ -0,0 +1,60 @@\n+/*\n+ * (C) Copyright 2017 Rockchip Electronics Co., Ltd.\n+ *\n+ * SPDX-License-Identifier: GPL-2.0\n+ */\n+\n+#include \n+#include \n+#include \n+#include \n+#include \n+#include \n+#include \n+\n+DECLARE_GLOBAL_DATA_PTR;\n+struct dram_info {\n+\tstruct ram_info info;\n+\tstruct rk3128_grf *grf;\n+};\n+\n+static int rk3128_dmc_probe(struct udevice *dev)\n+{\n+\tstruct dram_info *priv = dev_get_priv(dev);\n+\n+\tpriv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);\n+\tprintf(\"%s: grf=%p\\n\", __func__, priv->grf);\n+\tpriv->info.base = CONFIG_SYS_SDRAM_BASE;\n+\tpriv->info.size = rockchip_sdram_size(\n+\t\t\t\t(phys_addr_t)&priv->grf->os_reg[1]);\n+\n+\treturn 0;\n+}\n+\n+static int rk3128_dmc_get_info(struct udevice *dev, struct ram_info *info)\n+{\n+\tstruct dram_info *priv = dev_get_priv(dev);\n+\n+\t*info = priv->info;\n+\n+\treturn 0;\n+}\n+\n+static struct ram_ops rk3128_dmc_ops = {\n+\t.get_info = rk3128_dmc_get_info,\n+};\n+\n+\n+static const struct udevice_id rk3128_dmc_ids[] = {\n+\t{ .compatible = \"rockchip,rk3128-dmc\" },\n+\t{ }\n+};\n+\n+U_BOOT_DRIVER(dmc_rk3128) = {\n+\t.name = \"rockchip_rk3128_dmc\",\n+\t.id = UCLASS_RAM,\n+\t.of_match = rk3128_dmc_ids,\n+\t.ops = &rk3128_dmc_ops,\n+\t.probe = rk3128_dmc_probe,\n+\t.priv_auto_alloc_size = sizeof(struct dram_info),\n+};\n","prefixes":["U-Boot","8/8"]}