{"id":818959,"url":"http://patchwork.ozlabs.org/api/patches/818959/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/1506494000-31982-2-git-send-email-Bharat.Bhushan@nxp.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1506494000-31982-2-git-send-email-Bharat.Bhushan@nxp.com>","list_archive_url":null,"date":"2017-09-27T06:33:16","name":"[v4,1/5] target/arm/kvm: Translate the MSI doorbell in kvm_arch_fixup_msi_route","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"6bcfc5c3173412b5f2dae0dfaa1ee8e1bf6820c2","submitter":{"id":70741,"url":"http://patchwork.ozlabs.org/api/people/70741/?format=json","name":"Bharat Bhushan","email":"bharat.bhushan@nxp.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/1506494000-31982-2-git-send-email-Bharat.Bhushan@nxp.com/mbox/","series":[{"id":5292,"url":"http://patchwork.ozlabs.org/api/series/5292/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=5292","date":"2017-09-27T06:33:15","name":"virtio-iommu: VFIO integration","version":4,"mbox":"http://patchwork.ozlabs.org/series/5292/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/818959/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/818959/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; 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","X-Forefront-PRVS":"04433051BF","SpamDiagnosticOutput":"1:99","SpamDiagnosticMetadata":"NSPM","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"27 Sep 2017 06:36:16.0882\n\t(UTC)","X-MS-Exchange-CrossTenant-Id":"5afe0b00-7697-4969-b663-5eab37d5f47e","X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp":"TenantId=5afe0b00-7697-4969-b663-5eab37d5f47e; \n\tIp=[192.88.168.50]; Helo=[tx30smr01.am.freescale.net]","X-MS-Exchange-CrossTenant-FromEntityHeader":"HybridOnPrem","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"CY1PR03MB2364","X-detected-operating-system":"by eggs.gnu.org: Windows 7 or 8 [fuzzy]","X-Received-From":"104.47.37.81","Subject":"[Qemu-devel] [PATCH v4 1/5] target/arm/kvm: Translate the MSI\n\tdoorbell in kvm_arch_fixup_msi_route","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"wei@redhat.com, kevin.tian@intel.com,\n\tBharat Bhushan , marc.zyngier@arm.com,\n\ttn@semihalf.com, will.deacon@arm.com, drjones@redhat.com,\n\trobin.murphy@arm.com, christoffer.dall@linaro.org,\n\tbharatb.yadav@gmail.com","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"},"content":"Translate msi address if device is behind virtio-iommu.\nThis logic is similar to vSMMUv3/Intel iommu emulation.\n\nThis RFC patch does not handle the case where both vsmmuv3 and\nvirtio-iommu are available.\n\nSigned-off-by: Eric Auger \nSigned-off-by: Bharat Bhushan \n---\nv3->v4\n - No changes\n\n target/arm/kvm.c | 27 +++++++++++++++++++++++++++\n target/arm/trace-events | 3 +++\n 2 files changed, 30 insertions(+)","diff":"diff --git a/target/arm/kvm.c b/target/arm/kvm.c\nindex 211a7bf..895a630 100644\n--- a/target/arm/kvm.c\n+++ b/target/arm/kvm.c\n@@ -21,7 +21,11 @@\n #include \"kvm_arm.h\"\n #include \"cpu.h\"\n #include \"internals.h\"\n+#include \"trace.h\"\n #include \"hw/arm/arm.h\"\n+#include \"hw/pci/pci.h\"\n+#include \"hw/pci/msi.h\"\n+#include \"hw/virtio/virtio-iommu.h\"\n #include \"exec/memattrs.h\"\n #include \"exec/address-spaces.h\"\n #include \"hw/boards.h\"\n@@ -666,6 +670,29 @@ int kvm_arm_vgic_probe(void)\n int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route,\n uint64_t address, uint32_t data, PCIDevice *dev)\n {\n+ AddressSpace *as = pci_device_iommu_address_space(dev);\n+ IOMMUTLBEntry entry;\n+ IOMMUDevice *sdev;\n+ IOMMUMemoryRegionClass *imrc;\n+\n+ if (as == &address_space_memory) {\n+ return 0;\n+ }\n+\n+ /* MSI doorbell address is translated by an IOMMU */\n+ sdev = container_of(as, IOMMUDevice, as);\n+\n+ imrc = memory_region_get_iommu_class_nocheck(&sdev->iommu_mr);\n+\n+ entry = imrc->translate(&sdev->iommu_mr, address, IOMMU_WO);\n+\n+ route->u.msi.address_lo = entry.translated_addr;\n+ route->u.msi.address_hi = entry.translated_addr >> 32;\n+\n+ trace_kvm_arm_fixup_msi_route(address, sdev->devfn,\n+ sdev->iommu_mr.parent_obj.name,\n+ entry.translated_addr);\n+\n return 0;\n }\n \ndiff --git a/target/arm/trace-events b/target/arm/trace-events\nindex 9e37131..8b3c220 100644\n--- a/target/arm/trace-events\n+++ b/target/arm/trace-events\n@@ -8,3 +8,6 @@ arm_gt_tval_write(int timer, uint64_t value) \"gt_tval_write: timer %d value 0x%\"\n arm_gt_ctl_write(int timer, uint64_t value) \"gt_ctl_write: timer %d value 0x%\" PRIx64\n arm_gt_imask_toggle(int timer, int irqstate) \"gt_ctl_write: timer %d IMASK toggle, new irqstate %d\"\n arm_gt_cntvoff_write(uint64_t value) \"gt_cntvoff_write: value 0x%\" PRIx64\n+\n+# target/arm/kvm.c\n+kvm_arm_fixup_msi_route(uint64_t iova, uint32_t devid, const char *name, uint64_t gpa) \"MSI addr = 0x%\"PRIx64\" is translated for devfn=%d through %s into 0x%\"PRIx64\n","prefixes":["v4","1/5"]}