{"id":818899,"url":"http://patchwork.ozlabs.org/api/patches/818899/?format=json","web_url":"http://patchwork.ozlabs.org/project/devicetree-bindings/patch/1506480022-8995-2-git-send-email-yamada.masahiro@socionext.com/","project":{"id":37,"url":"http://patchwork.ozlabs.org/api/projects/37/?format=json","name":"Devicetree Bindings","link_name":"devicetree-bindings","list_id":"devicetree.vger.kernel.org","list_email":"devicetree@vger.kernel.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1506480022-8995-2-git-send-email-yamada.masahiro@socionext.com>","list_archive_url":null,"date":"2017-09-27T02:40:21","name":"[v6,1/2] dt-bindings: gpio: uniphier: add UniPhier GPIO binding","commit_ref":null,"pull_url":null,"state":"superseded","archived":true,"hash":"a9c3811f76ec5a9c0c5e2e77d032cca55834838f","submitter":{"id":65882,"url":"http://patchwork.ozlabs.org/api/people/65882/?format=json","name":"Masahiro Yamada","email":"yamada.masahiro@socionext.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/devicetree-bindings/patch/1506480022-8995-2-git-send-email-yamada.masahiro@socionext.com/mbox/","series":[{"id":5269,"url":"http://patchwork.ozlabs.org/api/series/5269/?format=json","web_url":"http://patchwork.ozlabs.org/project/devicetree-bindings/list/?series=5269","date":"2017-09-27T02:40:21","name":"gpio: uniphier: UniPhier GPIO driver","version":6,"mbox":"http://patchwork.ozlabs.org/series/5269/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/818899/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/818899/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=nifty.com header.i=@nifty.com\n\theader.b=\"TTVzQitU\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y22Ch1M1kz9t3x\n\tfor ;\n\tWed, 27 Sep 2017 12:42:08 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S967813AbdI0CmB (ORCPT );\n\tTue, 26 Sep 2017 22:42:01 -0400","from conuserg-08.nifty.com ([210.131.2.75]:58527 \"EHLO\n\tconuserg-08.nifty.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S967799AbdI0CmA (ORCPT\n\t); Tue, 26 Sep 2017 22:42:00 -0400","from pug.e01.socionext.com (p14092-ipngnfx01kyoto.kyoto.ocn.ne.jp\n\t[153.142.97.92]) (authenticated)\n\tby conuserg-08.nifty.com with ESMTP id v8R2eoYR029272;\n\tWed, 27 Sep 2017 11:40:51 +0900"],"DKIM-Filter":"OpenDKIM Filter v2.10.3 conuserg-08.nifty.com v8R2eoYR029272","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=nifty.com;\n\ts=dec2015msa; t=1506480052;\n\tbh=P4nFzQKMWibQFU0QwvqMPvI6Eei29vRx/+/3NWAsb+8=;\n\th=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n\tb=TTVzQitUKN0bv9QOvQBAVkpfim61qr4U6AzCBuLkNNyZkjrtyhUkNDVickBc3NRcD\n\trcPApjllA5TowAuY3iQjLDEZYoSHgQ5bo3eeV611s7CVUA3cr5oEBSCfRD1qUrJfoo\n\tWQB6KjgwhsybaZNovMyQjqjWSFt8GpbNYp/CByn7GT1jLeZtb+KmW01cmgCsp66V1c\n\tG2ZDPRr5l/DTZbitH1oYJyse1ZBdGKZUoUdjnDGLJE7mmVo0gRuyFF9wwmUoSPawy+\n\tpRIdweIHPnwXa5L3zV3jPMGVTv4EJR7YazSUuwSPrzq48EpTtjcuGJmMwPDeZarJrc\n\tBetAmCA/HUgBA==","X-Nifty-SrcIP":"[153.142.97.92]","From":"Masahiro Yamada ","To":"linux-gpio@vger.kernel.org","Cc":"devicetree@vger.kernel.org, Rob Herring ,\n\tMasami Hiramatsu ,\n\tJassi Brar ,\n\tMasahiro Yamada ,\n\tLinus Walleij ,\n\tlinux-kernel@vger.kernel.org, Rob Herring ,\n\tMark Rutland , linux-arm-kernel@lists.infradead.org","Subject":"[PATCH v6 1/2] dt-bindings: gpio: uniphier: add UniPhier GPIO\n\tbinding","Date":"Wed, 27 Sep 2017 11:40:21 +0900","Message-Id":"<1506480022-8995-2-git-send-email-yamada.masahiro@socionext.com>","X-Mailer":"git-send-email 2.7.4","In-Reply-To":"<1506480022-8995-1-git-send-email-yamada.masahiro@socionext.com>","References":"<1506480022-8995-1-git-send-email-yamada.masahiro@socionext.com>","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"},"content":"This GPIO controller is used on UniPhier SoC family.\n\nThe vendor specific property \"socionext,interrupt-ranges\" is for\nspecifying interrupt mapping to the parent interrupt controller\nbecause the mapping is not contiguous. It works like \"ranges\",\nbut transforms \"interrupts\" instead of \"reg\".\n\nSigned-off-by: Masahiro Yamada \nAcked-by: Rob Herring \n---\n\n\n .../devicetree/bindings/gpio/gpio-uniphier.txt | 40 ++++++++++++++++++++++\n 1 file changed, 40 insertions(+)\n create mode 100644 Documentation/devicetree/bindings/gpio/gpio-uniphier.txt","diff":"diff --git a/Documentation/devicetree/bindings/gpio/gpio-uniphier.txt b/Documentation/devicetree/bindings/gpio/gpio-uniphier.txt\nnew file mode 100644\nindex 0000000..6d9251a\n--- /dev/null\n+++ b/Documentation/devicetree/bindings/gpio/gpio-uniphier.txt\n@@ -0,0 +1,40 @@\n+UniPhier GPIO controller\n+\n+Required properties:\n+- compatible: Should be \"socionext,uniphier-gpio\".\n+- reg: Specifies offset and length of the register set for the device.\n+- gpio-controller: Marks the device node as a GPIO controller.\n+- #gpio-cells: Should be 2. The first cell is the pin number and the second\n+ cell is used to specify optional parameters.\n+- interrupt-parent: Specifies the parent interrupt controller.\n+- interrupt-controller: Marks the device node as an interrupt controller.\n+- #interrupt-cells: Should be 2. The first cell defines the interrupt number.\n+ The second cell bits[3:0] is used to specify trigger type as follows:\n+ 1 = low-to-high edge triggered\n+ 2 = high-to-low edge triggered\n+ 4 = active high level-sensitive\n+ 8 = active low level-sensitive\n+ Valid combinations are 1, 2, 3, 4, 8.\n+- ngpios: Specifies the number of GPIO lines.\n+- gpio-ranges: Mapping to pin controller pins (as described in gpio.txt)\n+- socionext,interrupt-ranges: Specifies an interrupt number mapping between\n+ this GPIO controller and its interrupt parent, in the form of arbitrary\n+ number of triplets.\n+\n+Optional properties:\n+- gpio-ranges-group-names: Used for named gpio ranges (as described in gpio.txt)\n+\n+Example:\n+\tgpio: gpio@55000000 {\n+\t\tcompatible = \"socionext,uniphier-gpio\";\n+\t\treg = <0x55000000 0x200>;\n+\t\tinterrupt-parent = <&aidet>;\n+\t\tinterrupt-controller;\n+\t\t#interrupt-cells = <2>;\n+\t\tgpio-controller;\n+\t\t#gpio-cells = <2>;\n+\t\tgpio-ranges = <&pinctrl 0 0 0>;\n+\t\tgpio-ranges-group-names = \"gpio_range\";\n+\t\tngpios = <248>;\n+\t\tsocionext,interrupt-ranges = <0 48 16>, <16 154 5>, <21 217 3>;\n+\t};\n","prefixes":["v6","1/2"]}