{"id":818868,"url":"http://patchwork.ozlabs.org/api/patches/818868/?format=json","web_url":"http://patchwork.ozlabs.org/project/devicetree-bindings/patch/20170927000355.30597-2-d-gerlach@ti.com/","project":{"id":37,"url":"http://patchwork.ozlabs.org/api/projects/37/?format=json","name":"Devicetree Bindings","link_name":"devicetree-bindings","list_id":"devicetree.vger.kernel.org","list_email":"devicetree@vger.kernel.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170927000355.30597-2-d-gerlach@ti.com>","list_archive_url":null,"date":"2017-09-27T00:03:54","name":"[v4,1/2] Documentation: dt: Update ti,emif bindings","commit_ref":null,"pull_url":null,"state":"not-applicable","archived":true,"hash":"b76718b07a447a7c33ac05a568e6439a1c39dbc7","submitter":{"id":61863,"url":"http://patchwork.ozlabs.org/api/people/61863/?format=json","name":"Dave Gerlach","email":"d-gerlach@ti.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/devicetree-bindings/patch/20170927000355.30597-2-d-gerlach@ti.com/mbox/","series":[{"id":5250,"url":"http://patchwork.ozlabs.org/api/series/5250/?format=json","web_url":"http://patchwork.ozlabs.org/project/devicetree-bindings/list/?series=5250","date":"2017-09-27T00:03:54","name":"memory: Introduce ti-emif-sram driver","version":4,"mbox":"http://patchwork.ozlabs.org/series/5250/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/818868/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/818868/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=ti.com header.i=@ti.com header.b=\"VnT68Qmt\"; \n\tdkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y1ykB50Zpz9t2Q\n\tfor ;\n\tWed, 27 Sep 2017 10:04:50 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1030518AbdI0AEs (ORCPT\n\t);\n\tTue, 26 Sep 2017 20:04:48 -0400","from lelnx194.ext.ti.com ([198.47.27.80]:64548 \"EHLO\n\tlelnx194.ext.ti.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1030492AbdI0AEr (ORCPT\n\t); Tue, 26 Sep 2017 20:04:47 -0400","from dflxv15.itg.ti.com ([128.247.5.124])\n\tby lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id v8R044IK025368; \n\tTue, 26 Sep 2017 19:04:04 -0500","from DFLE102.ent.ti.com (dfle102.ent.ti.com [10.64.6.23])\n\tby dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v8R044tL017474;\n\tTue, 26 Sep 2017 19:04:04 -0500","from DFLE102.ent.ti.com (10.64.6.23) by DFLE102.ent.ti.com\n\t(10.64.6.23) with Microsoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34;\n\tTue, 26 Sep 2017 19:04:04 -0500","from dflp32.itg.ti.com (10.64.6.15) by DFLE102.ent.ti.com\n\t(10.64.6.23) with Microsoft SMTP Server (version=TLS1_0,\n\tcipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend\n\tTransport; Tue, 26 Sep 2017 19:04:04 -0500","from legion.dal.design.ti.com (legion.dal.design.ti.com\n\t[128.247.22.53])\n\tby dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id v8R044BD017059;\n\tTue, 26 Sep 2017 19:04:04 -0500","from localhost (uda0274052.dhcp.ti.com [128.247.59.203])\n\tby legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id\n\tv8R044306515; Tue, 26 Sep 2017 19:04:04 -0500 (CDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com;\n\ts=ti-com-17Q1; t=1506470645;\n\tbh=HY/iqhvh0jsfSG8ioMxhup4/MX419m06dpmAiQ13ygQ=;\n\th=From:To:CC:Subject:Date:In-Reply-To:References;\n\tb=VnT68QmtbTuKeVuXU2Fh+Agz6OsECvyX9IvKRd2ixCeGf3Lya50C2x3b4bKl/TdPi\n\t989q6ps9u5q7Uf7TTIb9LzS5ihJ1+Zb0inVNBkVU3laycvwxOosyqYvLytG/Pk+RJ7\n\tW+W53Kk/RovsbQf2n+Hd+CGsik26vv3aZsoqcSMA=","From":"Dave Gerlach ","To":"Tony Lindgren , Santosh Shilimkar ,\n\tRussell King ","CC":",\n\t, ,\n\t, Rob Herring ,\n\tDave Gerlach , Keerthy J ,\n\tJohan Hovold ","Subject":"[PATCH v4 1/2] Documentation: dt: Update ti,emif bindings","Date":"Tue, 26 Sep 2017 19:03:54 -0500","Message-ID":"<20170927000355.30597-2-d-gerlach@ti.com>","X-Mailer":"git-send-email 2.13.4","In-Reply-To":"<20170927000355.30597-1-d-gerlach@ti.com>","References":"<20170927000355.30597-1-d-gerlach@ti.com>","MIME-Version":"1.0","Content-Type":"text/plain","X-EXCLAIMER-MD-CONFIG":"e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"},"content":"Update the Texas Instruments EMIF binding document to include the device\ntree bindings for ti,emif-am3352 and ti,emif-am4372 which are used by\nthe ti-emif-sram driver to provide low-level PM functionality.\n\nAcked-by: Rob Herring \nAcked-by: Tony Lindgren \nSigned-off-by: Dave Gerlach \n---\n .../devicetree/bindings/memory-controllers/ti/emif.txt | 18 +++++++++++++++++-\n 1 file changed, 17 insertions(+), 1 deletion(-)","diff":"diff --git a/Documentation/devicetree/bindings/memory-controllers/ti/emif.txt b/Documentation/devicetree/bindings/memory-controllers/ti/emif.txt\nindex 0db60470ebb6..8c0214b17c2b 100644\n--- a/Documentation/devicetree/bindings/memory-controllers/ti/emif.txt\n+++ b/Documentation/devicetree/bindings/memory-controllers/ti/emif.txt\n@@ -8,6 +8,7 @@ of the EMIF IP and memory parts attached to it.\n Required properties:\n - compatible\t: Should be of the form \"ti,emif-\" where \n is the IP revision of the specific EMIF instance.\n+\t\t For am335x should be ti,emif-am3352.\n \t\t For am437x should be ti,emif-am4372.\n \n - phy-type\t: indicating the DDR phy type. Following are the\n@@ -21,6 +22,13 @@ Required properties:\n the value shall be \"emif\" where is the number of the EMIF\n instance with base 1.\n \n+Required only for \"ti,emif-am3352\" and \"ti,emif-am4372\":\n+- sram\t\t\t: Phandles for generic sram driver nodes,\n+ first should be type 'protect-exec' for the driver to use to copy\n+ and run PM functions, second should be regular pool to be used for\n+ data region for code. See Documentation/devicetree/bindings/sram/sram.txt\n+ for more details.\n+\n Optional properties:\n - cs1-used\t\t: Have this property if CS1 of this EMIF\n instance has a memory part attached to it. If there is a memory\n@@ -42,7 +50,7 @@ Optional properties:\n - hw-caps-temp-alert\t: Have this property if the controller\n has capability for generating SDRAM temperature alerts\n \n-Example:\n+-Examples:\n \n emif1: emif@0x4c000000 {\n \tcompatible\t= \"ti,emif-4d\";\n@@ -54,3 +62,11 @@ emif1: emif@0x4c000000 {\n \thw-caps-ll-interface;\n \thw-caps-temp-alert;\n };\n+\n+/* From am33xx.dtsi */\n+emif: emif@4c000000 {\n+ compatible = \"ti,emif-am3352\";\n+ reg = <0x4C000000 0x1000>;\n+ sram = <&pm_sram_code\n+ &pm_sram_data>;\n+};\n","prefixes":["v4","1/2"]}