{"id":818811,"url":"http://patchwork.ozlabs.org/api/patches/818811/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20170926201427.2833-5-richard.henderson@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170926201427.2833-5-richard.henderson@linaro.org>","list_archive_url":null,"date":"2017-09-26T20:14:22","name":"[v3,4/9] disas: Support the Capstone disassembler library","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"b6f8dc5bc9bb826025a46db8a9f996d7b1e55d15","submitter":{"id":72104,"url":"http://patchwork.ozlabs.org/api/people/72104/?format=json","name":"Richard Henderson","email":"richard.henderson@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20170926201427.2833-5-richard.henderson@linaro.org/mbox/","series":[{"id":5223,"url":"http://patchwork.ozlabs.org/api/series/5223/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=5223","date":"2017-09-26T20:14:18","name":"Support the Capstone disassembler","version":3,"mbox":"http://patchwork.ozlabs.org/series/5223/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/818811/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/818811/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; 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This will be especially apparent with\nthe proposed vector extensions to TCG, as disas/i386.c does\nnot handle AVX.\n\nSigned-off-by: Richard Henderson \n---\n include/disas/bfd.h | 4 +\n include/disas/capstone.h | 38 ++++++++\n disas.c | 219 ++++++++++++++++++++++++++++++++++++++++++++---\n configure | 26 ++++++\n 4 files changed, 274 insertions(+), 13 deletions(-)\n create mode 100644 include/disas/capstone.h","diff":"diff --git a/include/disas/bfd.h b/include/disas/bfd.h\nindex b01e002b4c..0f4ecdeb88 100644\n--- a/include/disas/bfd.h\n+++ b/include/disas/bfd.h\n@@ -377,6 +377,10 @@ typedef struct disassemble_info {\n /* Command line options specific to the target disassembler. */\n char * disassembler_options;\n \n+ /* Options for Capstone disassembly. */\n+ int cap_arch;\n+ int cap_mode;\n+\n } disassemble_info;\n \n \f\ndiff --git a/include/disas/capstone.h b/include/disas/capstone.h\nnew file mode 100644\nindex 0000000000..84e214956d\n--- /dev/null\n+++ b/include/disas/capstone.h\n@@ -0,0 +1,38 @@\n+#ifndef QEMU_CAPSTONE_H\n+#define QEMU_CAPSTONE_H 1\n+\n+#ifdef CONFIG_CAPSTONE\n+\n+#include \n+\n+#else\n+\n+/* Just enough to allow backends to init without ifdefs. */\n+\n+#define CS_ARCH_ARM -1\n+#define CS_ARCH_ARM64 -1\n+#define CS_ARCH_MIPS -1\n+#define CS_ARCH_X86 -1\n+#define CS_ARCH_PPC -1\n+#define CS_ARCH_SPARC -1\n+#define CS_ARCH_SYSZ -1\n+\n+#define CS_MODE_LITTLE_ENDIAN 0\n+#define CS_MODE_BIG_ENDIAN 0\n+#define CS_MODE_ARM 0\n+#define CS_MODE_16 0\n+#define CS_MODE_32 0\n+#define CS_MODE_64 0\n+#define CS_MODE_THUMB 0\n+#define CS_MODE_MCLASS 0\n+#define CS_MODE_V8 0\n+#define CS_MODE_MICRO 0\n+#define CS_MODE_MIPS3 0\n+#define CS_MODE_MIPS32R6 0\n+#define CS_MODE_MIPSGP64 0\n+#define CS_MODE_V9 0\n+#define CS_MODE_MIPS32 0\n+#define CS_MODE_MIPS64 0\n+\n+#endif /* CONFIG_CAPSTONE */\n+#endif /* QEMU_CAPSTONE_H */\ndiff --git a/disas.c b/disas.c\nindex ad675dc361..746d76c07d 100644\n--- a/disas.c\n+++ b/disas.c\n@@ -6,6 +6,7 @@\n \n #include \"cpu.h\"\n #include \"disas/disas.h\"\n+#include \"disas/capstone.h\"\n \n typedef struct CPUDebug {\n struct disassemble_info info;\n@@ -171,6 +172,192 @@ static int print_insn_od_target(bfd_vma pc, disassemble_info *info)\n return print_insn_objdump(pc, info, \"OBJD-T\");\n }\n \n+#ifdef CONFIG_CAPSTONE\n+/* Temporary storage for the capstone library. This will be alloced via\n+ malloc with a size private to the library; thus there's no reason not\n+ to share this across calls and across host vs target disassembly. */\n+static __thread cs_insn *cap_insn;\n+\n+/* Initialize the Capstone library. */\n+/* ??? It would be nice to cache this. We would need one handle for the\n+ host and one for the target. For most targets we can reset specific\n+ parameters via cs_option(CS_OPT_MODE, new_mode), but we cannot change\n+ CS_ARCH_* in this way. Thus we would need to be able to close and\n+ re-open the target handle with a different arch for the target in order\n+ to handle AArch64 vs AArch32 mode switching. */\n+static cs_err cap_disas_start(disassemble_info *info, csh *handle)\n+{\n+ cs_mode cap_mode = info->cap_mode;\n+ cs_err err;\n+\n+ cap_mode += (info->endian == BFD_ENDIAN_BIG ? CS_MODE_BIG_ENDIAN\n+ : CS_MODE_LITTLE_ENDIAN);\n+\n+ err = cs_open(info->cap_arch, cap_mode, handle);\n+ if (err != CS_ERR_OK) {\n+ return err;\n+ }\n+\n+ /* ??? There probably ought to be a better place to put this. */\n+ if (info->cap_arch == CS_ARCH_X86) {\n+ /* We don't care about errors (if for some reason the library\n+ is compiled without AT&T syntax); the user will just have\n+ to deal with the Intel syntax. */\n+ cs_option(*handle, CS_OPT_SYNTAX, CS_OPT_SYNTAX_ATT);\n+ }\n+\n+ /* \"Disassemble\" unknown insns as \".byte W,X,Y,Z\". */\n+ cs_option(*handle, CS_OPT_SKIPDATA, CS_OPT_ON);\n+\n+ /* Allocate temp space for cs_disasm_iter. */\n+ if (cap_insn == NULL) {\n+ cap_insn = cs_malloc(*handle);\n+ if (cap_insn == NULL) {\n+ cs_close(handle);\n+ return CS_ERR_MEM;\n+ }\n+ }\n+ return CS_ERR_OK;\n+}\n+\n+/* Disassemble SIZE bytes at PC for the target. */\n+static bool cap_disas_target(disassemble_info *info, uint64_t pc, size_t size)\n+{\n+ uint8_t cap_buf[1024];\n+ csh handle;\n+ cs_insn *insn;\n+ size_t csize = 0;\n+\n+ if (cap_disas_start(info, &handle) != CS_ERR_OK) {\n+ return false;\n+ }\n+ insn = cap_insn;\n+\n+ while (1) {\n+ size_t tsize = MIN(sizeof(cap_buf) - csize, size);\n+ const uint8_t *cbuf = cap_buf;\n+\n+ target_read_memory(pc + csize, cap_buf + csize, tsize, info);\n+ csize += tsize;\n+ size -= tsize;\n+\n+ while (cs_disasm_iter(handle, &cbuf, &csize, &pc, insn)) {\n+ (*info->fprintf_func)(info->stream,\n+ \"0x%08\" PRIx64 \": %-12s %s\\n\",\n+ insn->address, insn->mnemonic,\n+ insn->op_str);\n+ }\n+\n+ /* If the target memory is not consumed, go back for more... */\n+ if (size != 0) {\n+ /* ... taking care to move any remaining fractional insn\n+ to the beginning of the buffer. */\n+ if (csize != 0) {\n+ memmove(cap_buf, cbuf, csize);\n+ }\n+ continue;\n+ }\n+\n+ /* Since the target memory is consumed, we should not have\n+ a remaining fractional insn. */\n+ if (csize != 0) {\n+ (*info->fprintf_func)(info->stream,\n+ \"Disassembler disagrees with translator \"\n+ \"over instruction decoding\\n\"\n+ \"Please report this to qemu-devel@nongnu.org\\n\");\n+ }\n+ break;\n+ }\n+\n+ cs_close(&handle);\n+ return true;\n+}\n+\n+/* Disassemble SIZE bytes at CODE for the host. */\n+static bool cap_disas_host(disassemble_info *info, void *code, size_t size)\n+{\n+ csh handle;\n+ const uint8_t *cbuf;\n+ cs_insn *insn;\n+ uint64_t pc;\n+\n+ if (cap_disas_start(info, &handle) != CS_ERR_OK) {\n+ return false;\n+ }\n+ insn = cap_insn;\n+\n+ cbuf = code;\n+ pc = (uintptr_t)code;\n+\n+ while (cs_disasm_iter(handle, &cbuf, &size, &pc, insn)) {\n+ (*info->fprintf_func)(info->stream,\n+ \"0x%08\" PRIx64 \": %-12s %s\\n\",\n+ insn->address, insn->mnemonic,\n+ insn->op_str);\n+ }\n+ if (size != 0) {\n+ (*info->fprintf_func)(info->stream,\n+ \"Disassembler disagrees with TCG over instruction encoding\\n\"\n+ \"Please report this to qemu-devel@nongnu.org\\n\");\n+ }\n+\n+ cs_close(&handle);\n+ return true;\n+}\n+\n+#if !defined(CONFIG_USER_ONLY)\n+/* Disassemble COUNT insns at PC for the target. */\n+static bool cap_disas_monitor(disassemble_info *info, uint64_t pc, int count)\n+{\n+ uint8_t cap_buf[32];\n+ csh handle;\n+ cs_insn *insn;\n+ size_t csize = 0;\n+\n+ if (cap_disas_start(info, &handle) != CS_ERR_OK) {\n+ return false;\n+ }\n+ insn = cap_insn;\n+\n+ while (1) {\n+ /* We want to read memory for one insn, but generically we do not\n+ know how much memory that is. We have a small buffer which is\n+ known to be sufficient for all supported targets. Try to not\n+ read beyond the page, Just In Case. For even more simplicity,\n+ ignore the actual target page size and use a 1k boundary. If\n+ that turns out to be insufficient, we'll come back around the\n+ loop and read more. */\n+ uint64_t epc = QEMU_ALIGN_UP(pc + csize + 1, 1024);\n+ size_t tsize = MIN(sizeof(cap_buf) - csize, epc - pc);\n+ const uint8_t *cbuf = cap_buf;\n+\n+ /* Make certain that we can make progress. */\n+ assert(tsize != 0);\n+ info->read_memory_func(pc, cap_buf + csize, tsize, info);\n+ csize += tsize;\n+\n+ if (cs_disasm_iter(handle, &cbuf, &csize, &pc, insn)) {\n+ (*info->fprintf_func)(info->stream,\n+ \"0x%08\" PRIx64 \": %-12s %s\\n\",\n+ insn->address, insn->mnemonic,\n+ insn->op_str);\n+ if (--count <= 0) {\n+ break;\n+ }\n+ }\n+ memmove(cap_buf, cbuf, csize);\n+ }\n+\n+ cs_close(&handle);\n+ return true;\n+}\n+#endif /* !CONFIG_USER_ONLY */\n+#else\n+# define cap_disas_target(i, p, s) false\n+# define cap_disas_host(i, p, s) false\n+# define cap_disas_monitor(i, p, c) false\n+#endif /* CONFIG_CAPSTONE */\n+\n /* Disassemble this for me please... (debugging). */\n void target_disas(FILE *out, CPUState *cpu, target_ulong code,\n target_ulong size)\n@@ -188,6 +375,8 @@ void target_disas(FILE *out, CPUState *cpu, target_ulong code,\n s.info.buffer_vma = code;\n s.info.buffer_length = size;\n s.info.print_address_func = generic_print_address;\n+ s.info.cap_arch = -1;\n+ s.info.cap_mode = 0;\n \n #ifdef TARGET_WORDS_BIGENDIAN\n s.info.endian = BFD_ENDIAN_BIG;\n@@ -199,6 +388,10 @@ void target_disas(FILE *out, CPUState *cpu, target_ulong code,\n cc->disas_set_info(cpu, &s.info);\n }\n \n+ if (s.info.cap_arch >= 0 && cap_disas_target(&s.info, code, size)) {\n+ return;\n+ }\n+\n if (s.info.print_insn == NULL) {\n s.info.print_insn = print_insn_od_target;\n }\n@@ -206,18 +399,6 @@ void target_disas(FILE *out, CPUState *cpu, target_ulong code,\n for (pc = code; size > 0; pc += count, size -= count) {\n \tfprintf(out, \"0x\" TARGET_FMT_lx \": \", pc);\n \tcount = s.info.print_insn(pc, &s.info);\n-#if 0\n- {\n- int i;\n- uint8_t b;\n- fprintf(out, \" {\");\n- for(i = 0; i < count; i++) {\n- target_read_memory(pc + i, &b, 1, &s.info);\n- fprintf(out, \" %02x\", b);\n- }\n- fprintf(out, \" }\");\n- }\n-#endif\n \tfprintf(out, \"\\n\");\n \tif (count < 0)\n \t break;\n@@ -245,6 +426,8 @@ void disas(FILE *out, void *code, unsigned long size)\n s.info.buffer = code;\n s.info.buffer_vma = (uintptr_t)code;\n s.info.buffer_length = size;\n+ s.info.cap_arch = -1;\n+ s.info.cap_mode = 0;\n \n #ifdef HOST_WORDS_BIGENDIAN\n s.info.endian = BFD_ENDIAN_BIG;\n@@ -282,6 +465,11 @@ void disas(FILE *out, void *code, unsigned long size)\n #elif defined(__hppa__)\n print_insn = print_insn_hppa;\n #endif\n+\n+ if (s.info.cap_arch >= 0 && cap_disas_host(&s.info, code, size)) {\n+ return;\n+ }\n+\n if (print_insn == NULL) {\n print_insn = print_insn_od_host;\n }\n@@ -344,8 +532,9 @@ void monitor_disas(Monitor *mon, CPUState *cpu,\n monitor_disas_is_physical = is_physical;\n s.info.read_memory_func = monitor_read_memory;\n s.info.print_address_func = generic_print_address;\n-\n s.info.buffer_vma = pc;\n+ s.info.cap_arch = -1;\n+ s.info.cap_mode = 0;\n \n #ifdef TARGET_WORDS_BIGENDIAN\n s.info.endian = BFD_ENDIAN_BIG;\n@@ -357,6 +546,10 @@ void monitor_disas(Monitor *mon, CPUState *cpu,\n cc->disas_set_info(cpu, &s.info);\n }\n \n+ if (s.info.cap_arch >= 0 && cap_disas_monitor(&s.info, pc, nb_insn)) {\n+ return;\n+ }\n+\n if (!s.info.print_insn) {\n monitor_printf(mon, \"0x\" TARGET_FMT_lx\n \": Asm output not supported on this arch\\n\", pc);\ndiff --git a/configure b/configure\nindex 133a5757ef..62d172d88a 100755\n--- a/configure\n+++ b/configure\n@@ -366,6 +366,7 @@ opengl_dmabuf=\"no\"\n cpuid_h=\"no\"\n avx2_opt=\"no\"\n zlib=\"yes\"\n+capstone=\"\"\n lzo=\"\"\n snappy=\"\"\n bzip2=\"\"\n@@ -1284,6 +1285,10 @@ for opt do\n error_exit \"vhost-user isn't available on win32\"\n fi\n ;;\n+ --disable-capstone) capstone=\"no\"\n+ ;;\n+ --enable-capstone) capstone=\"yes\"\n+ ;;\n *)\n echo \"ERROR: unknown option $opt\"\n echo \"Try '$0 --help' for more information\"\n@@ -1530,6 +1535,7 @@ disabled with --disable-FEATURE, default is enabled if available:\n vxhs Veritas HyperScale vDisk backend support\n crypto-afalg Linux AF_ALG crypto backend driver\n vhost-user vhost-user support\n+ capstone capstone disassembler support\n \n NOTE: The object files are built at the place where configure is launched\n EOF\n@@ -4369,6 +4375,22 @@ EOF\n fi\n \n ##########################################\n+# capstone\n+\n+if test \"$capstone\" != no; then\n+ if $pkg_config capstone; then\n+ capstone=yes\n+ QEMU_CFLAGS=\"$QEMU_CFLAGS $($pkg_config --cflags capstone)\"\n+ LIBS=\"$($pkg_config --libs capstone) $LIBS\"\n+ else\n+ if test \"$capstone\" = yes; then\n+ feature_not_found capstone\n+ fi\n+ capstone=no\n+ fi\n+fi\n+\n+##########################################\n # check if we have fdatasync\n \n fdatasync=no\n@@ -5408,6 +5430,7 @@ echo \"jemalloc support $jemalloc\"\n echo \"avx2 optimization $avx2_opt\"\n echo \"replication support $replication\"\n echo \"VxHS block device $vxhs\"\n+echo \"capstone $capstone\"\n \n if test \"$sdl_too_old\" = \"yes\"; then\n echo \"-> Your SDL version is too old - please upgrade to have SDL support\"\n@@ -6069,6 +6092,9 @@ fi\n if test \"$ivshmem\" = \"yes\" ; then\n echo \"CONFIG_IVSHMEM=y\" >> $config_host_mak\n fi\n+if test \"$capstone\" = \"yes\" ; then\n+ echo \"CONFIG_CAPSTONE=y\" >> $config_host_mak\n+fi\n \n # Hold two types of flag:\n # CONFIG_THREAD_SETNAME_BYTHREAD - we've got a way of setting the name on\n","prefixes":["v3","4/9"]}