{"id":818618,"url":"http://patchwork.ozlabs.org/api/patches/818618/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-gpio/patch/7993a30fbc2e50a2d228fa0c8fad643c4034b101.1506428208.git-series.quentin.schulz@free-electrons.com/","project":{"id":42,"url":"http://patchwork.ozlabs.org/api/projects/42/?format=json","name":"Linux GPIO development","link_name":"linux-gpio","list_id":"linux-gpio.vger.kernel.org","list_email":"linux-gpio@vger.kernel.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<7993a30fbc2e50a2d228fa0c8fad643c4034b101.1506428208.git-series.quentin.schulz@free-electrons.com>","list_archive_url":null,"date":"2017-09-26T12:17:13","name":"[v2,03/10] pinctrl: axp209: use drv_data of pinctrl_pin_desc to store pin reg","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"2850edb6affc9699cc86917771d163570c0b9203","submitter":{"id":69366,"url":"http://patchwork.ozlabs.org/api/people/69366/?format=json","name":"Quentin Schulz","email":"quentin.schulz@free-electrons.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-gpio/patch/7993a30fbc2e50a2d228fa0c8fad643c4034b101.1506428208.git-series.quentin.schulz@free-electrons.com/mbox/","series":[{"id":5123,"url":"http://patchwork.ozlabs.org/api/series/5123/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-gpio/list/?series=5123","date":"2017-09-26T12:17:17","name":"add pinmuxing support for pins in AXP209 and AXP813 PMICs","version":2,"mbox":"http://patchwork.ozlabs.org/series/5123/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/818618/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/818618/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-gpio-owner@vger.kernel.org;\n\treceiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y1g5Y71zyz9tXq\n\tfor ;\n\tTue, 26 Sep 2017 22:20:33 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S968626AbdIZMT4 (ORCPT );\n\tTue, 26 Sep 2017 08:19:56 -0400","from mail.free-electrons.com ([62.4.15.54]:52111 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S966189AbdIZMSH (ORCPT\n\t); Tue, 26 Sep 2017 08:18:07 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid 3615320846; Tue, 26 Sep 2017 14:18:05 +0200 (CEST)","from localhost.localdomain\n\t(LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id D7C7E20860;\n\tTue, 26 Sep 2017 14:17:54 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT,\n\tURIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0","From":"Quentin Schulz ","To":"linus.walleij@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com,\n\twens@csie.org, linux@armlinux.org.uk,\n\tmaxime.ripard@free-electrons.com, lee.jones@linaro.org","Cc":"linux-gpio@vger.kernel.org, devicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tlinux-sunxi@googlegroups.com, thomas.petazzoni@free-electrons.com,\n\tQuentin Schulz ","Subject":"[PATCH v2 03/10] pinctrl: axp209: use drv_data of pinctrl_pin_desc\n\tto store pin reg","Date":"Tue, 26 Sep 2017 14:17:13 +0200","Message-Id":"<7993a30fbc2e50a2d228fa0c8fad643c4034b101.1506428208.git-series.quentin.schulz@free-electrons.com>","X-Mailer":"git-send-email 2.11.0","In-Reply-To":["",""],"References":["",""],"Sender":"linux-gpio-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"linux-gpio@vger.kernel.org"},"content":"Instead of using a function to retrieve each pin's correct control\nregister, use drv_data within pinctrl_pin_desc to store the ctrl reg.\n\nRemove axp20x_gpio_get_reg and replace every occurrence by a get from\ndrv_data.\n\nSigned-off-by: Quentin Schulz \n---\n drivers/pinctrl/pinctrl-axp209.c | 42 +++++++--------------------------\n 1 file changed, 9 insertions(+), 33 deletions(-)","diff":"diff --git a/drivers/pinctrl/pinctrl-axp209.c b/drivers/pinctrl/pinctrl-axp209.c\nindex b35e8dd..4bbcba2 100644\n--- a/drivers/pinctrl/pinctrl-axp209.c\n+++ b/drivers/pinctrl/pinctrl-axp209.c\n@@ -32,10 +32,11 @@\n #define AXP20X_GPIO_FUNCTION_OUT_HIGH\t1\n #define AXP20X_GPIO_FUNCTION_INPUT\t2\n \n-#define AXP20X_PINCTRL_PIN(_pin_num, _pin)\t\t\t\\\n+#define AXP20X_PINCTRL_PIN(_pin_num, _pin, _regs)\t\t\\\n \t{\t\t\t\t\t\t\t\\\n \t\t.number = _pin_num,\t\t\t\t\\\n \t\t.name = _pin,\t\t\t\t\t\\\n+\t\t.drv_data = _regs,\t\t\t\t\\\n \t}\n \n #define AXP20X_PIN(_pin, ...)\t\t\t\t\t\\\n@@ -91,17 +92,17 @@ struct axp20x_gpio {\n };\n \n static const struct axp20x_desc_pin axp209_pins[] = {\n-\tAXP20X_PIN(AXP20X_PINCTRL_PIN(0, \"GPIO0\"),\n+\tAXP20X_PIN(AXP20X_PINCTRL_PIN(0, \"GPIO0\", (void *)AXP20X_GPIO0_CTRL),\n \t\t AXP20X_FUNCTION(0x0, \"gpio_out\"),\n \t\t AXP20X_FUNCTION(0x2, \"gpio_in\"),\n \t\t AXP20X_FUNCTION(0x3, \"ldo\"),\n \t\t AXP20X_FUNCTION(0x4, \"adc\")),\n-\tAXP20X_PIN(AXP20X_PINCTRL_PIN(1, \"GPIO1\"),\n+\tAXP20X_PIN(AXP20X_PINCTRL_PIN(1, \"GPIO1\", (void *)AXP20X_GPIO1_CTRL),\n \t\t AXP20X_FUNCTION(0x0, \"gpio_out\"),\n \t\t AXP20X_FUNCTION(0x2, \"gpio_in\"),\n \t\t AXP20X_FUNCTION(0x3, \"ldo\"),\n \t\t AXP20X_FUNCTION(0x4, \"adc\")),\n-\tAXP20X_PIN(AXP20X_PINCTRL_PIN(2, \"GPIO2\"),\n+\tAXP20X_PIN(AXP20X_PINCTRL_PIN(2, \"GPIO2\", (void *)AXP20X_GPIO2_CTRL),\n \t\t AXP20X_FUNCTION(0x0, \"gpio_out\"),\n \t\t AXP20X_FUNCTION(0x2, \"gpio_in\")),\n };\n@@ -111,20 +112,6 @@ static const struct axp20x_pinctrl_desc axp20x_pinctrl_data = {\n \t.npins\t= ARRAY_SIZE(axp209_pins),\n };\n \n-static int axp20x_gpio_get_reg(unsigned offset)\n-{\n-\tswitch (offset) {\n-\tcase 0:\n-\t\treturn AXP20X_GPIO0_CTRL;\n-\tcase 1:\n-\t\treturn AXP20X_GPIO1_CTRL;\n-\tcase 2:\n-\t\treturn AXP20X_GPIO2_CTRL;\n-\t}\n-\n-\treturn -EINVAL;\n-}\n-\n static int axp20x_gpio_input(struct gpio_chip *chip, unsigned offset)\n {\n \treturn pinctrl_gpio_direction_input(chip->base + offset);\n@@ -146,12 +133,9 @@ static int axp20x_gpio_get(struct gpio_chip *chip, unsigned offset)\n static int axp20x_gpio_get_direction(struct gpio_chip *chip, unsigned offset)\n {\n \tstruct axp20x_gpio *gpio = gpiochip_get_data(chip);\n+\tint reg = (int)gpio->desc->pins[offset].pin.drv_data;\n \tunsigned int val;\n-\tint reg, ret;\n-\n-\treg = axp20x_gpio_get_reg(offset);\n-\tif (reg < 0)\n-\t\treturn reg;\n+\tint ret;\n \n \tret = regmap_read(gpio->regmap, reg, &val);\n \tif (ret)\n@@ -184,11 +168,7 @@ static void axp20x_gpio_set(struct gpio_chip *chip, unsigned offset,\n \t\t\t int value)\n {\n \tstruct axp20x_gpio *gpio = gpiochip_get_data(chip);\n-\tint reg;\n-\n-\treg = axp20x_gpio_get_reg(offset);\n-\tif (reg < 0)\n-\t\treturn;\n+\tint reg = (int)gpio->desc->pins[offset].pin.drv_data;\n \n \tregmap_update_bits(gpio->regmap, reg,\n \t\t\t AXP20X_GPIO_FUNCTIONS,\n@@ -200,11 +180,7 @@ static int axp20x_pmx_set(struct pinctrl_dev *pctldev, unsigned int offset,\n \t\t\t u8 config)\n {\n \tstruct axp20x_gpio *gpio = pinctrl_dev_get_drvdata(pctldev);\n-\tint reg;\n-\n-\treg = axp20x_gpio_get_reg(offset);\n-\tif (reg < 0)\n-\t\treturn reg;\n+\tint reg = (int)gpio->desc->pins[offset].pin.drv_data;\n \n \treturn regmap_update_bits(gpio->regmap, reg, AXP20X_GPIO_FUNCTIONS,\n \t\t\t\t config);\n","prefixes":["v2","03/10"]}