{"id":818514,"url":"http://patchwork.ozlabs.org/api/patches/818514/?format=json","web_url":"http://patchwork.ozlabs.org/project/gcc/patch/20170926103751.21907-3-krebbel@linux.vnet.ibm.com/","project":{"id":17,"url":"http://patchwork.ozlabs.org/api/projects/17/?format=json","name":"GNU Compiler Collection","link_name":"gcc","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170926103751.21907-3-krebbel@linux.vnet.ibm.com>","list_archive_url":null,"date":"2017-09-26T10:37:45","name":"[2/8] S/390: Add widening vector mult lo/hi patterns","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"db7d595cc80b9d44f4d63173c8f7ceecb2564eac","submitter":{"id":4421,"url":"http://patchwork.ozlabs.org/api/people/4421/?format=json","name":"Andreas Krebbel","email":"krebbel@linux.vnet.ibm.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/gcc/patch/20170926103751.21907-3-krebbel@linux.vnet.ibm.com/mbox/","series":[{"id":5096,"url":"http://patchwork.ozlabs.org/api/series/5096/?format=json","web_url":"http://patchwork.ozlabs.org/project/gcc/list/?series=5096","date":"2017-09-26T10:37:43","name":"S/390: Enable vect tests on S/390 + fixes and improvements","version":1,"mbox":"http://patchwork.ozlabs.org/series/5096/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/818514/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/818514/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list gcc-patches@gcc.gnu.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=gcc-patches-return-462947-incoming=patchwork.ozlabs.org@gcc.gnu.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org\n\theader.b=\"WAZUohJj\"; dkim-atps=neutral","sourceware.org; auth=none"],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3y1cqy0wn6z9t6C\n\tfor ;\n\tTue, 26 Sep 2017 20:38:37 +1000 (AEST)","(qmail 102145 invoked by alias); 26 Sep 2017 10:38:06 -0000","(qmail 102038 invoked by uid 89); 26 Sep 2017 10:38:05 -0000","from mx0b-001b2d01.pphosted.com (HELO mx0a-001b2d01.pphosted.com)\n\t(148.163.158.5) by sourceware.org\n\t(qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP;\n\tTue, 26 Sep 2017 10:38:04 +0000","from pps.filterd (m0098413.ppops.net [127.0.0.1])\tby\n\tmx0b-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv8QAZ5Dg133485\tfor ;\n\tTue, 26 Sep 2017 06:37:57 -0400","from e06smtp10.uk.ibm.com (e06smtp10.uk.ibm.com\n\t[195.75.94.106])\tby mx0b-001b2d01.pphosted.com with ESMTP id\n\t2d7jbt32c6-1\t(version=TLSv1.2 cipher=AES256-SHA bits=256\n\tverify=NOT)\tfor ;\n\tTue, 26 Sep 2017 06:37:57 -0400","from localhost\tby e06smtp10.uk.ibm.com with IBM ESMTP SMTP\n\tGateway: Authorized Use Only! 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Violators will be prosecuted;\n\tTue, 26 Sep 2017 11:37:54 +0100","from d06av21.portsmouth.uk.ibm.com (d06av21.portsmouth.uk.ibm.com\n\t[9.149.105.232])\tby b06cxnps4075.portsmouth.uk.ibm.com\n\t(8.14.9/8.14.9/NCO v10.0) with ESMTP id v8QAbsb320316406\tfor\n\t; Tue, 26 Sep 2017 10:37:54 GMT","from d06av21.portsmouth.uk.ibm.com (unknown [127.0.0.1])\tby IMSVA\n\t(Postfix) with ESMTP id 68A3152041\tfor ;\n\tTue, 26 Sep 2017 10:32:44 +0100 (BST)","from maggie.boeblingen.de.ibm.com (unknown [9.152.212.134])\tby\n\td06av21.portsmouth.uk.ibm.com (Postfix) with ESMTPS id\n\t4E0995203F\tfor ;\n\tTue, 26 Sep 2017 10:32:44 +0100 (BST)"],"DomainKey-Signature":"a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id\n\t:list-unsubscribe:list-archive:list-post:list-help:sender:from\n\t:to:subject:date:in-reply-to:references:message-id; q=dns; s=\n\tdefault; b=eHCuHGNTKnfz1EHakyw01Mxn9cD8RPakGiZH2Xq0AUvqbzAoEg104\n\tXrxtc3LV52QeNlW569b/l3rzznTEJEuz94GPsrpiRoIP5cAUeQzfXJvBI2U/w1oF\n\t6Gh/XqxPNA36zyd+zrUZ9ZzddFOXsIrj8C8NrRDfeqQ+WnxZsJrFtA=","DKIM-Signature":"v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id\n\t:list-unsubscribe:list-archive:list-post:list-help:sender:from\n\t:to:subject:date:in-reply-to:references:message-id; s=default;\n\tbh=m1RbYIv77AQ6y6RqG1WlFUqctvE=; b=WAZUohJjS3rjPZM+0n9pOi893KgE\n\tFdeoTF37bZgYc6S7toJFhCFgercM9DnZArzZkZyKEIfi77hdQehR+UcWuF9RGQuS\n\tGa1ktHeuPePTQgE7iSUPyDwy4usO2qFrWC/F5m+zlNO8rp20AuG5bHpzEdC7oN+7\n\tvgCV0AqBWjD0Mcw=","Mailing-List":"contact gcc-patches-help@gcc.gnu.org; run by ezmlm","Precedence":"bulk","List-Id":"","List-Unsubscribe":"","List-Archive":"","List-Post":"","List-Help":"","Sender":"gcc-patches-owner@gcc.gnu.org","X-Virus-Found":"No","X-Spam-SWARE-Status":"No, score=-24.6 required=5.0 tests=AWL, BAYES_00,\n\tGIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3,\n\tKAM_LAZY_DOMAIN_SECURITY,\n\tRCVD_IN_DNSWL_LOW autolearn=ham version=3.3.2 spammy=vml","X-HELO":"mx0a-001b2d01.pphosted.com","From":"Andreas Krebbel ","To":"gcc-patches@gcc.gnu.org","Subject":"[PATCH 2/8] S/390: Add widening vector mult lo/hi patterns","Date":"Tue, 26 Sep 2017 12:37:45 +0200","In-Reply-To":"<20170926103751.21907-1-krebbel@linux.vnet.ibm.com>","References":"<20170926103751.21907-1-krebbel@linux.vnet.ibm.com>","X-TM-AS-GCONF":"00","x-cbid":"17092610-0040-0000-0000-000003DD25BC","X-IBM-AV-DETECTION":"SAVI=unused REMOTE=unused XFE=unused","x-cbparentid":"17092610-0041-0000-0000-000025DE6F3E","Message-Id":"<20170926103751.21907-3-krebbel@linux.vnet.ibm.com>","X-Proofpoint-Virus-Version":"vendor=fsecure engine=2.50.10432:, ,\n\tdefinitions=2017-09-26_03:, , signatures=0","X-Proofpoint-Spam-Details":"rule=outbound_notspam policy=outbound score=0\n\tspamscore=0 suspectscore=1 malwarescore=0 phishscore=0\n\tadultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx\n\tscancount=1 engine=8.0.1-1707230000\n\tdefinitions=main-1709260158","X-IsSubscribed":"yes"},"content":"Add support for widening vector multiply lo/hi patterns. These do not\ndirectly match on IBM Z instructions but can be emulated with even/odd\n+ vector merge.\n\ngcc/ChangeLog:\n\n2017-09-26 Andreas Krebbel \n\n\t* config/s390/vector.md (\"vec_widen_umult_lo_\")\n\t(\"vec_widen_umult_hi_\", \"vec_widen_smult_lo_\")\n\t(\"vec_widen_smult_hi_\"): New expander definitions.\n---\n gcc/ChangeLog | 6 ++++\n gcc/config/s390/vector.md | 83 ++++++++++++++++++++++++++++++++++++++++++++---\n 2 files changed, 85 insertions(+), 4 deletions(-)","diff":"diff --git a/gcc/ChangeLog b/gcc/ChangeLog\nindex 7c6d7dc..dcee7cb 100644\n--- a/gcc/ChangeLog\n+++ b/gcc/ChangeLog\n@@ -1,3 +1,9 @@\n+2017-09-26 Andreas Krebbel \n+\n+\t* config/s390/vector.md (\"vec_widen_umult_lo_\")\n+\t(\"vec_widen_umult_hi_\", \"vec_widen_smult_lo_\")\n+\t(\"vec_widen_smult_hi_\"): New expander definitions.\n+\n 2017-09-26 Richard Biener \n \n \tPR tree-optimization/82320\ndiff --git a/gcc/config/s390/vector.md b/gcc/config/s390/vector.md\nindex 3cf7989..29131cd 100644\n--- a/gcc/config/s390/vector.md\n+++ b/gcc/config/s390/vector.md\n@@ -1065,10 +1065,85 @@\n \"vmlo\\t%v0,%v1,%v2\"\n [(set_attr \"op_type\" \"VRR\")])\n \n-; vec_widen_umult_hi\n-; vec_widen_umult_lo\n-; vec_widen_smult_hi\n-; vec_widen_smult_lo\n+\n+; Widening hi/lo multiplications\n+\n+; The S/390 instructions vml and vmh return the low or high parts of\n+; the double sized result elements in the corresponding elements of\n+; the target register. That's NOT what the vec_widen_umult_lo/hi\n+; patterns are expected to do.\n+\n+; We emulate the widening lo/hi multiplies with the even/odd versions\n+; followed by a vector merge\n+\n+\n+(define_expand \"vec_widen_umult_lo_\"\n+ [(set (match_dup 3)\n+\t(unspec: [(match_operand:VI_QHS 1 \"register_operand\" \"%v\")\n+\t\t\t (match_operand:VI_QHS 2 \"register_operand\" \"v\")]\n+\t\t\t UNSPEC_VEC_UMULT_EVEN))\n+ (set (match_dup 4)\n+\t(unspec: [(match_dup 1) (match_dup 2)]\n+\t\t\t UNSPEC_VEC_UMULT_ODD))\n+ (set (match_operand: 0 \"register_operand\" \"=v\")\n+\t(unspec: [(match_dup 3) (match_dup 4)]\n+\t\t\t UNSPEC_VEC_MERGEL))]\n+ \"TARGET_VX\"\n+ {\n+ operands[3] = gen_reg_rtx (mode);\n+ operands[4] = gen_reg_rtx (mode);\n+ })\n+\n+(define_expand \"vec_widen_umult_hi_\"\n+ [(set (match_dup 3)\n+\t(unspec: [(match_operand:VI_QHS 1 \"register_operand\" \"%v\")\n+\t\t\t (match_operand:VI_QHS 2 \"register_operand\" \"v\")]\n+\t\t\t UNSPEC_VEC_UMULT_EVEN))\n+ (set (match_dup 4)\n+\t(unspec: [(match_dup 1) (match_dup 2)]\n+\t\t\t UNSPEC_VEC_UMULT_ODD))\n+ (set (match_operand: 0 \"register_operand\" \"=v\")\n+\t(unspec: [(match_dup 3) (match_dup 4)]\n+\t\t\t UNSPEC_VEC_MERGEH))]\n+ \"TARGET_VX\"\n+ {\n+ operands[3] = gen_reg_rtx (mode);\n+ operands[4] = gen_reg_rtx (mode);\n+ })\n+\n+(define_expand \"vec_widen_smult_lo_\"\n+ [(set (match_dup 3)\n+\t(unspec: [(match_operand:VI_QHS 1 \"register_operand\" \"%v\")\n+\t\t\t (match_operand:VI_QHS 2 \"register_operand\" \"v\")]\n+\t\t\t UNSPEC_VEC_SMULT_EVEN))\n+ (set (match_dup 4)\n+\t(unspec: [(match_dup 1) (match_dup 2)]\n+\t\t\t UNSPEC_VEC_SMULT_ODD))\n+ (set (match_operand: 0 \"register_operand\" \"=v\")\n+\t(unspec: [(match_dup 3) (match_dup 4)]\n+\t\t\t UNSPEC_VEC_MERGEL))]\n+ \"TARGET_VX\"\n+ {\n+ operands[3] = gen_reg_rtx (mode);\n+ operands[4] = gen_reg_rtx (mode);\n+ })\n+\n+(define_expand \"vec_widen_smult_hi_\"\n+ [(set (match_dup 3)\n+\t(unspec: [(match_operand:VI_QHS 1 \"register_operand\" \"%v\")\n+\t\t\t (match_operand:VI_QHS 2 \"register_operand\" \"v\")]\n+\t\t\t UNSPEC_VEC_SMULT_EVEN))\n+ (set (match_dup 4)\n+\t(unspec: [(match_dup 1) (match_dup 2)]\n+\t\t\t UNSPEC_VEC_SMULT_ODD))\n+ (set (match_operand: 0 \"register_operand\" \"=v\")\n+\t(unspec: [(match_dup 3) (match_dup 4)]\n+\t\t\t UNSPEC_VEC_MERGEH))]\n+ \"TARGET_VX\"\n+ {\n+ operands[3] = gen_reg_rtx (mode);\n+ operands[4] = gen_reg_rtx (mode);\n+ })\n \n ; vec_widen_ushiftl_hi\n ; vec_widen_ushiftl_lo\n","prefixes":["2/8"]}