{"id":818446,"url":"http://patchwork.ozlabs.org/api/patches/818446/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-mtd/patch/20170926041700.22663-3-kalyan.kinthada@alliedtelesis.co.nz/","project":{"id":3,"url":"http://patchwork.ozlabs.org/api/projects/3/?format=json","name":"Linux MTD development","link_name":"linux-mtd","list_id":"linux-mtd.lists.infradead.org","list_email":"linux-mtd@lists.infradead.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170926041700.22663-3-kalyan.kinthada@alliedtelesis.co.nz>","list_archive_url":null,"date":"2017-09-26T04:17:00","name":"[2/2] mtd: nand: pxa3xx: Handle \"marvell, nand-force-csx\" compatible string","commit_ref":null,"pull_url":null,"state":"superseded","archived":false,"hash":"cb15532035b47d64b4bf4a57485dca44e05bf07d","submitter":{"id":72417,"url":"http://patchwork.ozlabs.org/api/people/72417/?format=json","name":"Kalyan Kinthada","email":"kalyan.kinthada@alliedtelesis.co.nz"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-mtd/patch/20170926041700.22663-3-kalyan.kinthada@alliedtelesis.co.nz/mbox/","series":[{"id":5054,"url":"http://patchwork.ozlabs.org/api/series/5054/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-mtd/list/?series=5054","date":"2017-09-26T04:16:58","name":"Implement guideline when NAND, NOR arbitration is enabled","version":1,"mbox":"http://patchwork.ozlabs.org/series/5054/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/818446/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/818446/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org; 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c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe:\n\tList-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:References:\n\tIn-Reply-To:Message-Id:Date:Subject:To:From:Reply-To:Content-ID:\n\tContent-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc\n\t:Resent-Message-ID:List-Owner;\n\tbh=OMfwabT2JbgpDWp0So5lxlg8HycH1K95du0YLWSMVvw=;\n\tb=mvDaQBFo2hXyhlx0LnmENbuWd7\n\t3hFfC7Vv4gQ6maRgMXyOhJ1JIspEbJkHLxEVEOBUIs2K9Ie2F/0/KXbZYi8EvUdhwg8vbgf44xHI0\n\tXdWfP9/uV+yrNbp+qXwjwG5RBFRGCbDGNTyKmYMg3dnzpBf0l2pniHG1LvWrXK1fItOuNeI+YN6Ux\n\tn1y80gRSrxCaSYUw0e8QscvsUpIsFN4U8eM4bnDaYQ1XCXJroiN7qw+/VsCfl6yrCXxMeXXV89moJ\n\tRXPWLr8lxJkxEiZAqDRcSPxaiFqoxdBNHtTCroxMuuXd3wYh0BLaqwKKLgAqTgMVOtlaWm5lpronT\n\tiEKEqadw==;","v=1; a=rsa-sha256; c=relaxed/relaxed; d=alliedtelesis.co.nz; \n\ts=mail; t=1506399422;\n\tbh=CAM5w8ECjT5xBJN3gYbenbNNXPExYwDEtKiwXDidkcY=;\n\th=From:To:Cc:Subject:Date:In-Reply-To:References;\n\tb=ZCawBSYoSAe+b4GW403Nni5AQo/3IOhVuXhVsN8gO4OyKPpd96k9IrDH0/vzpCqjW\n\tVTPnxyIM4F3L6RRr/B/1UAzmYdyEQARaoGFh4my8oEN5GVmLklrMxLfkvc9Sk/rd0H\n\tAF9nX7CD5UHwP8wzstDzzUB0KnccxTCNZtlznnt0="],"From":"Kalyan Kinthada ","To":"dwmw2@infradead.org, computersforpeace@gmail.com,\n\tboris.brezillon@free-electrons.com, marek.vasut@gmail.com,\n\trichard@nod.at, \n\tcyrille.pitchen@wedev4u.fr, robh+dt@kernel.org, mark.rutland@arm.com, \n\tezequiel.garcia@free-electrons.com, devicetree@vger.kernel.org","Subject":"[PATCH 2/2] mtd: nand: pxa3xx: Handle \"marvell,\n\tnand-force-csx\" compatible string","Date":"Tue, 26 Sep 2017 17:17:00 +1300","Message-Id":"<20170926041700.22663-3-kalyan.kinthada@alliedtelesis.co.nz>","X-Mailer":"git-send-email 2.14.1","In-Reply-To":"<20170926041700.22663-1-kalyan.kinthada@alliedtelesis.co.nz>","References":"<20170926041700.22663-1-kalyan.kinthada@alliedtelesis.co.nz>","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170925_211735_312705_DAEB6A51 ","X-CRM114-Status":"GOOD ( 11.36 )","X-Spam-Score":"-2.0 (--)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-2.0 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-0.0 SPF_HELO_PASS SPF: HELO matches SPF record\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t-0.1 DKIM_VALID Message has at least one valid DKIM or DK signature\n\t0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n\tnot necessarily valid\n\t-0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n\tauthor's domain","X-BeenThere":"linux-mtd@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"Linux MTD discussion mailing list ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Kalyan Kinthada ,\n\tchris.packham@alliedtelesis.co.nz, linux-mtd@lists.infradead.org,\n\tlinux-kernel@vger.kernel.org","MIME-Version":"1.0","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-mtd\" ","Errors-To":"linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org"},"content":"When the arbitration between NOR and NAND flash is enabled\nthe field bit[21] in the Data Flash Control Register\nneeds to be set to 1 according to guidleine GL-5830741.\n\nThis commit sets the FORCE_CSX bit to 1 if the compatible\nstring \"marvell,nand-force-csx\" is enabled in the device tree\nof the corresponding boards.\n\nSigned-off-by: Kalyan Kinthada \n---\n drivers/mtd/nand/pxa3xx_nand.c | 6 ++++++\n include/linux/platform_data/mtd-nand-pxa3xx.h | 3 +++\n 2 files changed, 9 insertions(+)","diff":"diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c\nindex 85cff68643e0..4ad1f0601930 100644\n--- a/drivers/mtd/nand/pxa3xx_nand.c\n+++ b/drivers/mtd/nand/pxa3xx_nand.c\n@@ -68,6 +68,7 @@\n #define NDCR_PAGE_SZ\t\t(0x1 << 24)\n #define NDCR_NCSX\t\t(0x1 << 23)\n #define NDCR_ND_MODE\t\t(0x3 << 21)\n+#define NDCR_FORCE_CSX\t\t(0x1 << 21)\n #define NDCR_NAND_MODE \t(0x0)\n #define NDCR_CLR_PG_CNT\t\t(0x1 << 20)\n #define NFCV1_NDCR_ARB_CNTL\t(0x1 << 19)\n@@ -1464,6 +1465,7 @@ static int pxa3xx_nand_config_ident(struct pxa3xx_nand_info *info)\n \tinfo->chunk_size = PAGE_CHUNK_SIZE;\n \tinfo->reg_ndcr = 0x0; /* enable all interrupts */\n \tinfo->reg_ndcr |= (pdata->enable_arbiter) ? NDCR_ND_ARB_EN : 0;\n+\tinfo->reg_ndcr |= (pdata->force_csx) ? NDCR_FORCE_CSX : 0;\n \tinfo->reg_ndcr |= NDCR_RD_ID_CNT(READ_ID_BYTES);\n \tinfo->reg_ndcr |= NDCR_SPARE_EN;\n \n@@ -1498,6 +1500,7 @@ static void pxa3xx_nand_detect_config(struct pxa3xx_nand_info *info)\n \tinfo->reg_ndcr = ndcr &\n \t\t~(NDCR_INT_MASK | NDCR_ND_ARB_EN | NFCV1_NDCR_ARB_CNTL);\n \tinfo->reg_ndcr |= (pdata->enable_arbiter) ? NDCR_ND_ARB_EN : 0;\n+\tinfo->reg_ndcr |= (pdata->force_csx) ? NDCR_FORCE_CSX : 0;\n \tinfo->ndtr0cs0 = nand_readl(info, NDTR0CS0);\n \tinfo->ndtr1cs0 = nand_readl(info, NDTR1CS0);\n }\n@@ -1936,6 +1939,9 @@ static int pxa3xx_nand_probe_dt(struct platform_device *pdev)\n \t\tpdata->enable_arbiter = 1;\n \tif (of_get_property(np, \"marvell,nand-keep-config\", NULL))\n \t\tpdata->keep_config = 1;\n+\tif (of_get_property(np, \"marvell,nand-force-csx\", NULL))\n+\t\t/* Ref#: GL-5830741 */\n+\t\tpdata->force_csx = 1;\n \tof_property_read_u32(np, \"num-cs\", &pdata->num_cs);\n \n \tpdev->dev.platform_data = pdata;\ndiff --git a/include/linux/platform_data/mtd-nand-pxa3xx.h b/include/linux/platform_data/mtd-nand-pxa3xx.h\nindex 394d15597dc7..e7f2c8647c0e 100644\n--- a/include/linux/platform_data/mtd-nand-pxa3xx.h\n+++ b/include/linux/platform_data/mtd-nand-pxa3xx.h\n@@ -28,6 +28,9 @@ struct pxa3xx_nand_platform_data {\n \t/* allow platform code to keep OBM/bootloader defined NFC config */\n \tint\tkeep_config;\n \n+\t/* Force chip select false on busy */\n+\tint\tforce_csx;\n+\n \t/* indicate how many chip selects will be used */\n \tint\tnum_cs;\n \n","prefixes":["2/2"]}