{"id":818388,"url":"http://patchwork.ozlabs.org/api/patches/818388/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-tegra/patch/aa9a9c3a1447b37c6b3b5ce9a7ce5f73473832db.1506380746.git.digetx@gmail.com/","project":{"id":21,"url":"http://patchwork.ozlabs.org/api/projects/21/?format=json","name":"Linux Tegra Development","link_name":"linux-tegra","list_id":"linux-tegra.vger.kernel.org","list_email":"linux-tegra@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"","list_archive_url":null,"date":"2017-09-25T23:22:03","name":"[v1,2/5] clk: tegra: Bump SCLK clock rate to 216MHz on Tegra20","commit_ref":null,"pull_url":null,"state":"superseded","archived":false,"hash":"f45688941e192fa97057ba246fce0c777591dfa4","submitter":{"id":18124,"url":"http://patchwork.ozlabs.org/api/people/18124/?format=json","name":"Dmitry Osipenko","email":"digetx@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-tegra/patch/aa9a9c3a1447b37c6b3b5ce9a7ce5f73473832db.1506380746.git.digetx@gmail.com/mbox/","series":[{"id":5029,"url":"http://patchwork.ozlabs.org/api/series/5029/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-tegra/list/?series=5029","date":"2017-09-25T23:22:01","name":"NVIDIA Tegra AHB DMA controller driver","version":1,"mbox":"http://patchwork.ozlabs.org/series/5029/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/818388/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/818388/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; 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Increasing SCLK rate\nresults in an increased DMA transfer rate.\n\nSigned-off-by: Dmitry Osipenko \n---\n drivers/clk/tegra/clk-tegra20.c | 2 +-\n 1 file changed, 1 insertion(+), 1 deletion(-)","diff":"diff --git a/drivers/clk/tegra/clk-tegra20.c b/drivers/clk/tegra/clk-tegra20.c\nindex e76c0d292ca7..c511716093e2 100644\n--- a/drivers/clk/tegra/clk-tegra20.c\n+++ b/drivers/clk/tegra/clk-tegra20.c\n@@ -1031,7 +1031,7 @@ static struct tegra_clk_init_table init_table[] __initdata = {\n \t{ TEGRA20_CLK_PLL_P_OUT3, TEGRA20_CLK_CLK_MAX, 72000000, 1 },\n \t{ TEGRA20_CLK_PLL_P_OUT4, TEGRA20_CLK_CLK_MAX, 24000000, 1 },\n \t{ TEGRA20_CLK_PLL_C, TEGRA20_CLK_CLK_MAX, 600000000, 1 },\n-\t{ TEGRA20_CLK_PLL_C_OUT1, TEGRA20_CLK_CLK_MAX, 120000000, 1 },\n+\t{ TEGRA20_CLK_PLL_C_OUT1, TEGRA20_CLK_CLK_MAX, 216000000, 1 },\n \t{ TEGRA20_CLK_SCLK, TEGRA20_CLK_PLL_C_OUT1, 0, 1 },\n \t{ TEGRA20_CLK_HCLK, TEGRA20_CLK_CLK_MAX, 0, 1 },\n \t{ TEGRA20_CLK_PCLK, TEGRA20_CLK_CLK_MAX, 60000000, 1 },\n","prefixes":["v1","2/5"]}