{"id":818384,"url":"http://patchwork.ozlabs.org/api/patches/818384/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-tegra/patch/d6610e316d40e1f9cd3e10d0b41efa24a7d464a1.1506380746.git.digetx@gmail.com/","project":{"id":21,"url":"http://patchwork.ozlabs.org/api/projects/21/?format=json","name":"Linux Tegra Development","link_name":"linux-tegra","list_id":"linux-tegra.vger.kernel.org","list_email":"linux-tegra@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"","list_archive_url":null,"date":"2017-09-25T23:22:06","name":"[v1,5/5] ARM: dts: tegra: Add AHB DMA controller nodes","commit_ref":null,"pull_url":null,"state":"superseded","archived":false,"hash":"641c0e7f8628bb2891f1263daaa321de92f6b1dc","submitter":{"id":18124,"url":"http://patchwork.ozlabs.org/api/people/18124/?format=json","name":"Dmitry Osipenko","email":"digetx@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-tegra/patch/d6610e316d40e1f9cd3e10d0b41efa24a7d464a1.1506380746.git.digetx@gmail.com/mbox/","series":[{"id":5029,"url":"http://patchwork.ozlabs.org/api/series/5029/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-tegra/list/?series=5029","date":"2017-09-25T23:22:01","name":"NVIDIA Tegra AHB DMA controller driver","version":1,"mbox":"http://patchwork.ozlabs.org/series/5029/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/818384/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/818384/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-tegra-owner@vger.kernel.org;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"KO7GbT+B\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y1KtQ4tP9z9ryr\n\tfor ;\n\tTue, 26 Sep 2017 09:24:46 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S966281AbdIYXYq (ORCPT );\n\tMon, 25 Sep 2017 19:24:46 -0400","from mail-wr0-f193.google.com ([209.85.128.193]:37538 \"EHLO\n\tmail-wr0-f193.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S966230AbdIYXYc (ORCPT\n\t);\n\tMon, 25 Sep 2017 19:24:32 -0400","by mail-wr0-f193.google.com with SMTP id u48so918930wrf.4;\n\tMon, 25 Sep 2017 16:24:31 -0700 (PDT)","from localhost.localdomain (ppp109-252-90-109.pppoe.spdop.ru.\n\t[109.252.90.109]) by smtp.gmail.com with ESMTPSA id\n\ta139sm1161965lfa.39.2017.09.25.16.24.29\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tMon, 25 Sep 2017 16:24:30 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=gmail.com; s=20161025;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references\n\t:in-reply-to:references;\n\tbh=Zjlx561uIsf5/8xKAEykdK3xFZJG+sXaBIpxJAzV6zQ=;\n\tb=KO7GbT+B6//fwSnOvAb3nR4fMDOeurkptBvi8HOBA30ws+i2AV0CAdGegSUj6aw+TA\n\tTaJX70Fx1FCyvZ69K775Q0/ux2srztHBkPh8T2c/5ujBpMJzFwTJUtf68yI2H57HkvVB\n\tIGk0gj8zA6+yq3gNTVxnV5yFEN5DAp/CAfyl3+KVO8xLqL8dFcv1oHd+/Dljc9AvLQkd\n\t9Ks7172D8rAOS6MXiRlpUxiEQd149f0rWWy69Xrn4byOo1GzJYbYVBYpgPckayYhBK2Z\n\tKGY7/X+qwOgB8hX7iSa9V/KQ5t1OsSIstoDPmxkJnzvLB8WL+JJ1JgPHrjq149AMfgn5\n\tPkbA==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references:in-reply-to:references;\n\tbh=Zjlx561uIsf5/8xKAEykdK3xFZJG+sXaBIpxJAzV6zQ=;\n\tb=CdMOhQmXTk94TZTLPZB+tLIhtHx/NUgXwxzsNoECPBUehl/fNjKZW+GWZJxZUrh+gg\n\tOYSzWOjgFKzWoAlythB5Z8ot4zF8fTPmO67S7uEqs6jkkXuqiNNrDPJ7MKIYy2MB0EYN\n\tcRLGzHExXKBewTB28JIwRFiV071orvqVNdsSODC1vyRu8oVhC8CsffR5wY1TRFDj1b0A\n\ttuBlWJ5oN1djtBEkAALdvUl9VQY7bAeqEW0Z7kFEV1+eSUIN4PY+xKGAS7sg4gvjCrJU\n\tJlO3hzi958KzyVm83iOKztLzU5CI0tTDDVTuVk3JDVZ97qbJ88B+Scn+72QSTCpJCYox\n\tS1rg==","X-Gm-Message-State":"AHPjjUgrANF/K+miwRPSCYUVI1cRqzJygO9q8C2oq6tF5f5dsj9te2Tf\n\tZ+iwN9ck/zkx03trdOQfDtk=","X-Google-Smtp-Source":"AOwi7QC7TbLlFRzjeAjj1BElMCI0Cd/rSOGQp/BGcBhs81qLH/t6U//zxEj5SPhu8r2+NQre38HZdg==","X-Received":"by 10.25.81.216 with SMTP id g85mr2596620lfl.231.1506381870661; \n\tMon, 25 Sep 2017 16:24:30 -0700 (PDT)","From":"Dmitry Osipenko ","To":"Thierry Reding ,\n\tJonathan Hunter ,\n\tLaxman Dewangan ,\n\tPeter De Schrijver ,\n\tPrashant Gaikwad ,\n\tMichael Turquette ,\n\tStephen Boyd , Rob Herring ,\n\tVinod Koul ","Cc":"linux-tegra@vger.kernel.org, devicetree@vger.kernel.org,\n\tdmaengine@vger.kernel.org, linux-clk@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org","Subject":"[PATCH v1 5/5] ARM: dts: tegra: Add AHB DMA controller nodes","Date":"Tue, 26 Sep 2017 02:22:06 +0300","Message-Id":"","X-Mailer":"git-send-email 2.14.1","In-Reply-To":["",""],"References":["",""],"Sender":"linux-tegra-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"linux-tegra@vger.kernel.org"},"content":"Add AHB DMA controller nodes to Tegra20/30 DT's.\n\nSigned-off-by: Dmitry Osipenko \n---\n arch/arm/boot/dts/tegra20.dtsi | 9 +++++++++\n arch/arm/boot/dts/tegra30.dtsi | 9 +++++++++\n 2 files changed, 18 insertions(+)","diff":"diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi\nindex f1579c9a7ef4..d0c0c26427f7 100644\n--- a/arch/arm/boot/dts/tegra20.dtsi\n+++ b/arch/arm/boot/dts/tegra20.dtsi\n@@ -200,6 +200,15 @@\n \t\treg = <0x60007000 0x1000>;\n \t};\n \n+\tahbdma: ahbdma@60008000 {\n+\t\tcompatible = \"nvidia,tegra20-ahbdma\";\n+\t\treg = <0x60008000 0x2000>;\n+\t\tinterrupts = ;\n+\t\tclocks = <&tegra_car TEGRA20_CLK_AHBDMA>;\n+\t\tresets = <&tegra_car 33>;\n+\t\t#dma-cells = <1>;\n+\t};\n+\n \tapbdma: dma@6000a000 {\n \t\tcompatible = \"nvidia,tegra20-apbdma\";\n \t\treg = <0x6000a000 0x1200>;\ndiff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi\nindex 13960fda7471..0800d9a8c546 100644\n--- a/arch/arm/boot/dts/tegra30.dtsi\n+++ b/arch/arm/boot/dts/tegra30.dtsi\n@@ -291,6 +291,15 @@\n \t\treg = <0x60007000 0x1000>;\n \t};\n \n+\tahbdma: ahbdma@60008000 {\n+\t\tcompatible = \"nvidia,tegra20-ahbdma\";\n+\t\treg = <0x60008000 0x2000>;\n+\t\tinterrupts = ;\n+\t\tclocks = <&tegra_car TEGRA30_CLK_AHBDMA>;\n+\t\tresets = <&tegra_car 33>;\n+\t\t#dma-cells = <1>;\n+\t};\n+\n \tapbdma: dma@6000a000 {\n \t\tcompatible = \"nvidia,tegra30-apbdma\", \"nvidia,tegra20-apbdma\";\n \t\treg = <0x6000a000 0x1400>;\n","prefixes":["v1","5/5"]}