{"id":818361,"url":"http://patchwork.ozlabs.org/api/patches/818361/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-tegra/patch/ce6e7ed98e64688517d9f912e9c6e848169d0d3c.1506377430.git.digetx@gmail.com/","project":{"id":21,"url":"http://patchwork.ozlabs.org/api/projects/21/?format=json","name":"Linux Tegra Development","link_name":"linux-tegra","list_id":"linux-tegra.vger.kernel.org","list_email":"linux-tegra@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<ce6e7ed98e64688517d9f912e9c6e848169d0d3c.1506377430.git.digetx@gmail.com>","list_archive_url":null,"date":"2017-09-25T22:15:43","name":"[v1,2/2] ARM: dts: tegra20: Add video decoder node","commit_ref":null,"pull_url":null,"state":"deferred","archived":false,"hash":"ca0ffdbfb50b668580a7cb26b5d3c01b6ed58640","submitter":{"id":18124,"url":"http://patchwork.ozlabs.org/api/people/18124/?format=json","name":"Dmitry Osipenko","email":"digetx@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-tegra/patch/ce6e7ed98e64688517d9f912e9c6e848169d0d3c.1506377430.git.digetx@gmail.com/mbox/","series":[{"id":5021,"url":"http://patchwork.ozlabs.org/api/series/5021/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-tegra/list/?series=5021","date":"2017-09-25T22:15:43","name":"NVIDIA Tegra20 video decoder driver","version":1,"mbox":"http://patchwork.ozlabs.org/series/5021/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/818361/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/818361/checks/","tags":{},"related":[],"headers":{"Return-Path":"<linux-tegra-owner@vger.kernel.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=linux-tegra-owner@vger.kernel.org;\n\treceiver=<UNKNOWN>)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"f/9yjFmZ\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y1JSr1K0bz9s7G\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 26 Sep 2017 08:21:00 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S964879AbdIYWUo (ORCPT <rfc822;incoming@patchwork.ozlabs.org>);\n\tMon, 25 Sep 2017 18:20:44 -0400","from mail-wr0-f195.google.com ([209.85.128.195]:37267 \"EHLO\n\tmail-wr0-f195.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S936030AbdIYWUc (ORCPT\n\t<rfc822;linux-tegra@vger.kernel.org>);\n\tMon, 25 Sep 2017 18:20:32 -0400","by mail-wr0-f195.google.com with SMTP id u48so813924wrf.4;\n\tMon, 25 Sep 2017 15:20:30 -0700 (PDT)","from localhost.localdomain (ppp109-252-90-109.pppoe.spdop.ru.\n\t[109.252.90.109]) by smtp.gmail.com with ESMTPSA id\n\te2sm1146241lff.61.2017.09.25.15.20.28\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tMon, 25 Sep 2017 15:20:29 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=gmail.com; s=20161025;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references\n\t:in-reply-to:references;\n\tbh=oSlzcAXD2oZguab5EdTGlvguEC+AOB4JNJkHKLjlgxg=;\n\tb=f/9yjFmZ7cxXe3yszJ/LSPCHGpU5jQ12xeQTROrK0pDeUQGu3uGeS3U97nz7WiBFUa\n\tSW54d/qqdQyIkml1DmvYhkMmXydoxhK/gUhbg41tTIb/EjnEXggjVUZ9cOnRXL3SyYca\n\t052jWceTBQytG5dvo/lyUPoG7v7vfaQ8HYXA4Dzj5+zYMw9E6/NIINJoLtsjjCcjenon\n\tODncYnWkPhqGCnZ88C6NTUuVex5P54h9i/To8dgwjy0U8C2ydmviNUV+42BwCwKWXj08\n\tGUzPtm24ue4OpG19PKLvo0XLEBQ0uDQhllpz2IUOhJAJ5KP6dLMJgBAqvbTuH/GKKv1H\n\tTeCg==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references:in-reply-to:references;\n\tbh=oSlzcAXD2oZguab5EdTGlvguEC+AOB4JNJkHKLjlgxg=;\n\tb=J1xyT5JFPu3oqyQuLHMKBoDOiEXxGqUVJR3TcN+f90AhR7jA3GwQcYn2y+ixq1Oan2\n\tNTcWVQrzGq1Yvi8xtqe2ooIzRGuZhAk/Z0YXqHN+rUW5nwQv9c6iMDj2qo6p8tlPm+PN\n\tn+qbo08uibkpZP1gz+g1OLZTWWneac+U/GN+22rk5i06p+hN3KyiR4EvUohDJGNU9AxO\n\tA9rdnUbUWsEjRKGuNVwT4SNR/BGAUyHYoKEXNbES7fN5s9+Vaf76FlEbhtarB+klizCE\n\tUKaXofJpG8sxFGoz9cowiD4d4gC8OyBwJbskeULzYxwLrzWt81mTmass3oavyps0d8vq\n\tghFg==","X-Gm-Message-State":"AHPjjUgydnKZV09O1uQc297q3ERMJMUAcWq7m8ICwUDkksieaZb1gDJi\n\t4s50zqs1pSchvfdpMNcsroU=","X-Google-Smtp-Source":"AOwi7QCgR4j7xDcacDvVSMP6qc3ydQd1xIBoV7VQRUCsrmHifZJsARWIdzDJT8rPSeGZtdIdCeUf5Q==","X-Received":"by 10.25.104.22 with SMTP id d22mr2894579lfc.41.1506378030225;\n\tMon, 25 Sep 2017 15:20:30 -0700 (PDT)","From":"Dmitry Osipenko <digetx@gmail.com>","To":"Thierry Reding <thierry.reding@gmail.com>,\n\tJonathan Hunter <jonathanh@nvidia.com>,\n\tGreg Kroah-Hartman <gregkh@linuxfoundation.org>,\n\tRob Herring <robh+dt@kernel.org>","Cc":"linux-tegra@vger.kernel.org, devel@driverdev.osuosl.org,\n\tdevicetree@vger.kernel.org, linux-kernel@vger.kernel.org","Subject":"[PATCH v1 2/2] ARM: dts: tegra20: Add video decoder node","Date":"Tue, 26 Sep 2017 01:15:43 +0300","Message-Id":"<ce6e7ed98e64688517d9f912e9c6e848169d0d3c.1506377430.git.digetx@gmail.com>","X-Mailer":"git-send-email 2.14.1","In-Reply-To":["<cover.1506377430.git.digetx@gmail.com>","<cover.1506377430.git.digetx@gmail.com>"],"References":["<cover.1506377430.git.digetx@gmail.com>","<cover.1506377430.git.digetx@gmail.com>"],"Sender":"linux-tegra-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<linux-tegra.vger.kernel.org>","X-Mailing-List":"linux-tegra@vger.kernel.org"},"content":"Add a device node for the video decoder engine found on Tegra20.\n\nSigned-off-by: Dmitry Osipenko <digetx@gmail.com>\n---\n arch/arm/boot/dts/tegra20.dtsi | 16 ++++++++++++++++\n 1 file changed, 16 insertions(+)","diff":"diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi\nindex 7c85f97f72ea..fb485a5e63d7 100644\n--- a/arch/arm/boot/dts/tegra20.dtsi\n+++ b/arch/arm/boot/dts/tegra20.dtsi\n@@ -249,6 +249,22 @@\n \t\t*/\n \t};\n \n+\tvde@6001a000 {\n+\t\tcompatible = \"nvidia,tegra20-vde\";\n+\t\treg = <0x6001a000 0x3D00    /* VDE registers */\n+\t\t       0x40000400 0x3FC00>; /* IRAM area */\n+\t\treg-names = \"regs\", \"iram\";\n+\t\tinterrupts = <GIC_SPI  8 IRQ_TYPE_LEVEL_HIGH>, /* UCQ error interrupt */\n+\t\t\t     <GIC_SPI  9 IRQ_TYPE_LEVEL_HIGH>, /* Sync token interrupt */\n+\t\t\t     <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, /* BSE-V interrupt */\n+\t\t\t     <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>, /* BSE-A interrupt */\n+\t\t\t     <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; /* SXE interrupt */\n+\t\tinterrupt-names = \"ucq-error\", \"sync-token\", \"bsev\", \"bsea\", \"sxe\";\n+\t\tclocks = <&tegra_car TEGRA20_CLK_VDE>;\n+\t\tresets = <&tegra_car 61>;\n+\t\treset-names = \"vde\";\n+\t};\n+\n \tapbmisc@70000800 {\n \t\tcompatible = \"nvidia,tegra20-apbmisc\";\n \t\treg = <0x70000800 0x64   /* Chip revision */\n","prefixes":["v1","2/2"]}