{"id":818269,"url":"http://patchwork.ozlabs.org/api/patches/818269/?format=json","web_url":"http://patchwork.ozlabs.org/project/devicetree-bindings/patch/20170925145352.13145-2-miquel.raynal@free-electrons.com/","project":{"id":37,"url":"http://patchwork.ozlabs.org/api/projects/37/?format=json","name":"Devicetree Bindings","link_name":"devicetree-bindings","list_id":"devicetree.vger.kernel.org","list_email":"devicetree@vger.kernel.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170925145352.13145-2-miquel.raynal@free-electrons.com>","list_archive_url":null,"date":"2017-09-25T14:53:50","name":"[1/3] Documentation: devicetree: add pxa3xx compatible and syscon property","commit_ref":null,"pull_url":null,"state":"not-applicable","archived":true,"hash":"7f30f2aeadd2b69cae7555d37b52fc480201dd0e","submitter":{"id":71917,"url":"http://patchwork.ozlabs.org/api/people/71917/?format=json","name":"Miquel Raynal","email":"miquel.raynal@free-electrons.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/devicetree-bindings/patch/20170925145352.13145-2-miquel.raynal@free-electrons.com/mbox/","series":[{"id":4974,"url":"http://patchwork.ozlabs.org/api/series/4974/?format=json","web_url":"http://patchwork.ozlabs.org/project/devicetree-bindings/list/?series=4974","date":"2017-09-25T14:53:49","name":"Enable NAND on Armada-7040-DB board","version":1,"mbox":"http://patchwork.ozlabs.org/series/4974/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/818269/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/818269/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3y16Yn0ykjz9t67\n\tfor ;\n\tTue, 26 Sep 2017 00:54:37 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S935223AbdIYOyg (ORCPT );\n\tMon, 25 Sep 2017 10:54:36 -0400","from mail.free-electrons.com ([62.4.15.54]:46080 \"EHLO\n\tmail.free-electrons.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S934683AbdIYOyf (ORCPT\n\t); Mon, 25 Sep 2017 10:54:35 -0400","by mail.free-electrons.com (Postfix, from userid 110)\n\tid C62A420824; Mon, 25 Sep 2017 16:54:33 +0200 (CEST)","from localhost.localdomain\n\t(LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87])\n\tby mail.free-electrons.com (Postfix) with ESMTPSA id 60614208A2;\n\tMon, 25 Sep 2017 16:54:23 +0200 (CEST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on\n\tmail.free-electrons.com","X-Spam-Level":"","X-Spam-Status":"No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT\n\tshortcircuit=ham autolearn=disabled version=3.4.0","From":"Miquel Raynal ","To":"David Woodhouse ,\n\tBrian Norris ,\n\tBoris Brezillon ,\n\tMarek Vasut ,\n\tRichard Weinberger , \n\tCyrille Pitchen ,\n\tJason Cooper , Andrew Lunn ,\n\tGregory Clement ,\n\tSebastian Hesselbarth ,\n\tEzequiel Garcia ,\n\tlinux-mtd@lists.infradead.org, devicetree@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org","Cc":"Thomas Petazzoni ,\n\tAntoine Tenart ,\n\tNadav Haklai ,\n\tMiquel Raynal ","Subject":"[PATCH 1/3] Documentation: devicetree: add pxa3xx compatible and\n\tsyscon property","Date":"Mon, 25 Sep 2017 16:53:50 +0200","Message-Id":"<20170925145352.13145-2-miquel.raynal@free-electrons.com>","X-Mailer":"git-send-email 2.11.0","In-Reply-To":"<20170925145352.13145-1-miquel.raynal@free-electrons.com>","References":"<20170925145352.13145-1-miquel.raynal@free-electrons.com>","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"},"content":"Document the new pxa3xx_nand driver compatible string for A7k/A8k SoCs\nthat need to access system controller registers in order to enable the\nNAND controller through the use of a phandle pointed to by the\n'marvell,system-controller' property.\n\nSigned-off-by: Miquel Raynal \n---\n Documentation/devicetree/bindings/mtd/pxa3xx-nand.txt | 4 ++++\n 1 file changed, 4 insertions(+)","diff":"diff --git a/Documentation/devicetree/bindings/mtd/pxa3xx-nand.txt b/Documentation/devicetree/bindings/mtd/pxa3xx-nand.txt\nindex d9b655f11048..d4ee4da58463 100644\n--- a/Documentation/devicetree/bindings/mtd/pxa3xx-nand.txt\n+++ b/Documentation/devicetree/bindings/mtd/pxa3xx-nand.txt\n@@ -5,9 +5,13 @@ Required properties:\n - compatible:\t\tShould be set to one of the following:\n \t\t\tmarvell,pxa3xx-nand\n \t\t\tmarvell,armada370-nand\n+\t\t\tmarvell,armada-8k-nand\n - reg: \t\tThe register base for the controller\n - interrupts:\t\tThe interrupt to map\n - #address-cells:\tSet to <1> if the node includes partitions\n+ - marvell,system-controller: Set to retrieve the syscon node that handles\n+\t\t\tNAND controller related registers (only required\n+\t\t\twith marvell,armada-8k-nand compatible).\n \n Optional properties:\n \n","prefixes":["1/3"]}