{"id":817909,"url":"http://patchwork.ozlabs.org/api/patches/817909/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/1506264466-28252-5-git-send-email-mark.cave-ayland@ilande.co.uk/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1506264466-28252-5-git-send-email-mark.cave-ayland@ilande.co.uk>","list_archive_url":null,"date":"2017-09-24T14:47:43","name":"[4/7] macio: pass channel into MACIOIDEState via qdev property","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"58d0a9fe3cd316309eb4072d5d0cd53090f009f3","submitter":{"id":12451,"url":"http://patchwork.ozlabs.org/api/people/12451/?format=json","name":"Mark Cave-Ayland","email":"mark.cave-ayland@ilande.co.uk"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/1506264466-28252-5-git-send-email-mark.cave-ayland@ilande.co.uk/mbox/","series":[{"id":4817,"url":"http://patchwork.ozlabs.org/api/series/4817/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=4817","date":"2017-09-24T14:47:39","name":"mac_dbdma: tidy-up and QOMify","version":1,"mbox":"http://patchwork.ozlabs.org/series/4817/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/817909/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/817909/checks/","tags":{},"related":[],"headers":{"Return-Path":"<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)","Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3y0VVS41FGz9sDB\n\tfor <incoming@patchwork.ozlabs.org>;\n\tMon, 25 Sep 2017 00:49:36 +1000 (AEST)","from localhost ([::1]:38418 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1dw8Du-0003GV-J5\n\tfor incoming@patchwork.ozlabs.org; Sun, 24 Sep 2017 10:49:34 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:57156)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from <mark.cave-ayland@ilande.co.uk>) id 1dw8Cb-0002gv-Lq\n\tfor qemu-devel@nongnu.org; Sun, 24 Sep 2017 10:48:14 -0400","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from <mark.cave-ayland@ilande.co.uk>) id 1dw8Ca-0002HU-LY\n\tfor qemu-devel@nongnu.org; Sun, 24 Sep 2017 10:48:13 -0400","from chuckie.co.uk ([82.165.15.123]:49771\n\thelo=s16892447.onlinehome-server.info)\n\tby eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from <mark.cave-ayland@ilande.co.uk>)\n\tid 1dw8CX-00029p-TW; Sun, 24 Sep 2017 10:48:10 -0400","from host86-191-82-173.range86-191.btcentralplus.com\n\t([86.191.82.173] helo=kentang.home)\n\tby s16892447.onlinehome-server.info with esmtpsa\n\t(TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.76)\n\t(envelope-from <mark.cave-ayland@ilande.co.uk>)\n\tid 1dw8CV-0006gI-BC; Sun, 24 Sep 2017 15:48:08 +0100"],"From":"Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>","To":"qemu-ppc@nongnu.org, qemu-devel@nongnu.org, david@gibson.dropbear.id.au","Date":"Sun, 24 Sep 2017 15:47:43 +0100","Message-Id":"<1506264466-28252-5-git-send-email-mark.cave-ayland@ilande.co.uk>","X-Mailer":"git-send-email 1.7.10.4","In-Reply-To":"<1506264466-28252-1-git-send-email-mark.cave-ayland@ilande.co.uk>","References":"<1506264466-28252-1-git-send-email-mark.cave-ayland@ilande.co.uk>","X-SA-Exim-Connect-IP":"86.191.82.173","X-SA-Exim-Mail-From":"mark.cave-ayland@ilande.co.uk","X-SA-Exim-Version":"4.2.1 (built Sun, 08 Jan 2012 02:45:44 +0000)","X-SA-Exim-Scanned":"Yes (on s16892447.onlinehome-server.info)","X-detected-operating-system":"by eggs.gnu.org: GNU/Linux 3.x [fuzzy]","X-Received-From":"82.165.15.123","Subject":"[Qemu-devel] [PATCH 4/7] macio: pass channel into MACIOIDEState via\n\tqdev property","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"<qemu-devel.nongnu.org>","List-Unsubscribe":"<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>","List-Archive":"<http://lists.nongnu.org/archive/html/qemu-devel/>","List-Post":"<mailto:qemu-devel@nongnu.org>","List-Help":"<mailto:qemu-devel-request@nongnu.org?subject=help>","List-Subscribe":"<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>"},"content":"One of the reasons macio_ide_register_dma() needs to exist is because the\nchannel id isn't passed into the MACIO_IDE object. Pass in the channel id\nusing a qdev property to remove this requirement.\n\nSigned-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>\n---\n hw/ide/macio.c        |   10 ++++++++--\n hw/misc/macio/macio.c |    4 +++-\n hw/ppc/mac.h          |    4 ++--\n 3 files changed, 13 insertions(+), 5 deletions(-)","diff":"diff --git a/hw/ide/macio.c b/hw/ide/macio.c\nindex 18ae952..19d5f5a 100644\n--- a/hw/ide/macio.c\n+++ b/hw/ide/macio.c\n@@ -452,12 +452,18 @@ static void macio_ide_initfn(Object *obj)\n     s->ide_irq = qemu_allocate_irq(pmac_ide_irq, s, 1);\n }\n \n+static Property macio_ide_properties[] = {\n+    DEFINE_PROP_UINT32(\"channel\", MACIOIDEState, channel, 0),\n+    DEFINE_PROP_END_OF_LIST(),\n+};\n+\n static void macio_ide_class_init(ObjectClass *oc, void *data)\n {\n     DeviceClass *dc = DEVICE_CLASS(oc);\n \n     dc->realize = macio_ide_realizefn;\n     dc->reset = macio_ide_reset;\n+    dc->props = macio_ide_properties;\n     dc->vmsd = &vmstate_pmac;\n     set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);\n }\n@@ -487,10 +493,10 @@ void macio_ide_init_drives(MACIOIDEState *s, DriveInfo **hd_table)\n     }\n }\n \n-void macio_ide_register_dma(MACIOIDEState *s, void *dbdma, int channel)\n+void macio_ide_register_dma(MACIOIDEState *s, void *dbdma)\n {\n     s->dbdma = dbdma;\n-    DBDMA_register_channel(dbdma, channel, s->dma_irq,\n+    DBDMA_register_channel(dbdma, s->channel, s->dma_irq,\n                            pmac_ide_transfer, pmac_ide_flush, s);\n }\n \ndiff --git a/hw/misc/macio/macio.c b/hw/misc/macio/macio.c\nindex f459f17..41b377e 100644\n--- a/hw/misc/macio/macio.c\n+++ b/hw/misc/macio/macio.c\n@@ -159,7 +159,9 @@ static void macio_realize_ide(MacIOState *s, MACIOIDEState *ide,\n     sysbus_dev = SYS_BUS_DEVICE(ide);\n     sysbus_connect_irq(sysbus_dev, 0, irq0);\n     sysbus_connect_irq(sysbus_dev, 1, irq1);\n-    macio_ide_register_dma(ide, s->dbdma, dmaid);\n+    qdev_prop_set_uint32(DEVICE(ide), \"channel\", dmaid);\n+    macio_ide_register_dma(ide, s->dbdma);\n+\n     object_property_set_bool(OBJECT(ide), true, \"realized\", errp);\n }\n \ndiff --git a/hw/ppc/mac.h b/hw/ppc/mac.h\nindex 300fc8a..b3a26c4 100644\n--- a/hw/ppc/mac.h\n+++ b/hw/ppc/mac.h\n@@ -131,7 +131,7 @@ typedef struct MACIOIDEState {\n     /*< private >*/\n     SysBusDevice parent_obj;\n     /*< public >*/\n-\n+    uint32_t channel;\n     qemu_irq real_ide_irq;\n     qemu_irq real_dma_irq;\n     qemu_irq ide_irq;\n@@ -147,7 +147,7 @@ typedef struct MACIOIDEState {\n } MACIOIDEState;\n \n void macio_ide_init_drives(MACIOIDEState *ide, DriveInfo **hd_table);\n-void macio_ide_register_dma(MACIOIDEState *ide, void *dbdma, int channel);\n+void macio_ide_register_dma(MACIOIDEState *ide, void *dbdma);\n \n void macio_init(PCIDevice *dev,\n                 MemoryRegion *pic_mem,\n","prefixes":["4/7"]}