{"id":817295,"url":"http://patchwork.ozlabs.org/api/patches/817295/?format=json","web_url":"http://patchwork.ozlabs.org/project/devicetree-bindings/patch/1506049229-117376-1-git-send-email-hjc@rock-chips.com/","project":{"id":37,"url":"http://patchwork.ozlabs.org/api/projects/37/?format=json","name":"Devicetree Bindings","link_name":"devicetree-bindings","list_id":"devicetree.vger.kernel.org","list_email":"devicetree@vger.kernel.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1506049229-117376-1-git-send-email-hjc@rock-chips.com>","list_archive_url":null,"date":"2017-09-22T03:00:26","name":"[v2,1/3] dt-bindings: Add document for rockchip RGB output interface","commit_ref":null,"pull_url":null,"state":"changes-requested","archived":true,"hash":"3a2feca76b5de5cee554116c632aa51165be8c91","submitter":{"id":72133,"url":"http://patchwork.ozlabs.org/api/people/72133/?format=json","name":"Huang Jiachai","email":"hjc@rock-chips.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/devicetree-bindings/patch/1506049229-117376-1-git-send-email-hjc@rock-chips.com/mbox/","series":[{"id":4531,"url":"http://patchwork.ozlabs.org/api/series/4531/?format=json","web_url":"http://patchwork.ozlabs.org/project/devicetree-bindings/list/?series=4531","date":"2017-09-22T03:00:21","name":"Add support rockchip RGB output interface","version":2,"mbox":"http://patchwork.ozlabs.org/series/4531/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/817295/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/817295/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xyytN13T1z9sRV\n\tfor ;\n\tFri, 22 Sep 2017 13:01:32 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751833AbdIVDAk (ORCPT\n\t);\n\tThu, 21 Sep 2017 23:00:40 -0400","from regular1.263xmail.com ([211.150.99.132]:49516 \"EHLO\n\tregular1.263xmail.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751653AbdIVDAj (ORCPT\n\t); Thu, 21 Sep 2017 23:00:39 -0400","from hjc?rock-chips.com (unknown [192.168.167.224])\n\tby regular1.263xmail.com (Postfix) with ESMTP id ED20094FF;\n\tFri, 22 Sep 2017 11:00:35 +0800 (CST)","from localhost.localdomain (localhost [127.0.0.1])\n\tby smtp.263.net (Postfix) with ESMTPA id 051C53D6;\n\tFri, 22 Sep 2017 11:00:30 +0800 (CST)","from localhost.localdomain (unknown [58.22.7.114])\n\tby smtp.263.net (Postfix) whith ESMTP id 31836U47R21;\n\tFri, 22 Sep 2017 11:00:35 +0800 (CST)"],"X-263anti-spam":"KSV:0;","X-MAIL-GRAY":"0","X-MAIL-DELIVERY":"1","X-KSVirus-check":"0","X-ABS-CHECKED":"4","X-RL-SENDER":"hjc@rock-chips.com","X-FST-TO":"mark.yao@rock-chips.com","X-SENDER-IP":"58.22.7.114","X-LOGIN-NAME":"hjc@rock-chips.com","X-UNIQUE-TAG":"","X-ATTACHMENT-NUM":"0","X-SENDER":"hjc@rock-chips.com","X-DNS-TYPE":"0","From":"Sandy Huang ","To":"Mark Yao , David Airlie ,\n\tRob Herring , Mark Rutland ,\n\tHeiko Stuebner ","Cc":"Sandy Huang , dri-devel@lists.freedesktop.org,\n\tdevicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tlinux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org","Subject":"[PATCH v2 1/3] dt-bindings: Add document for rockchip RGB output\n\tinterface","Date":"Fri, 22 Sep 2017 11:00:26 +0800","Message-Id":"<1506049229-117376-1-git-send-email-hjc@rock-chips.com>","X-Mailer":"git-send-email 2.7.4","In-Reply-To":"<1506049221-117283-1-git-send-email-hjc@rock-chips.com>","References":"<1506049221-117283-1-git-send-email-hjc@rock-chips.com>","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"},"content":"This path add support rv1108 rgb output interface driver.\n\nSigned-off-by: Sandy Huang \n---\nChanges in v2:\n 1. rename rockchip,rgb-mode to rgb-mode;\n 2. delete reg for signle endpoint;\n\n .../bindings/display/rockchip/rockchip-rgb.txt | 78 ++++++++++++++++++++++\n 1 file changed, 78 insertions(+)\n create mode 100644 Documentation/devicetree/bindings/display/rockchip/rockchip-rgb.txt","diff":"diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip-rgb.txt b/Documentation/devicetree/bindings/display/rockchip/rockchip-rgb.txt\nnew file mode 100644\nindex 0000000..86bd1ce\n--- /dev/null\n+++ b/Documentation/devicetree/bindings/display/rockchip/rockchip-rgb.txt\n@@ -0,0 +1,78 @@\n+Rockchip RV1108 RGB interface\n+================================\n+\n+Required properties:\n+- compatible: matching the soc type:\n+\t- \"rockchip,rv1108-rgb\";\n+\n+Optional properties:\n+- pinctrl-names: must contain a \"lcdc\" entry.\n+- pinctrl-0: pin control group to be used for this interface.\n+\n+Required nodes:\n+- rgb-mode: should be \"p888\", \"p666\", \"p565\", \"s888\", \"s888-dummy\"\n+\t- p888: output r8-g8-b8 at each dclk cycle for per-pixel\n+\t- p666: output r6-g6-b6 at each dclk cycle for per-pixel\n+\t- p565: output r5-g6-b5 at each dclk cycle for per-pixel\n+\t- s888: output r8-g8-b8 in three dclk cycle for per-pixel\n+\t- s888-dmmy: output r8-g8-b8-dummy in four dclk cycle for per-pixel\n+\n+The rgb has two video ports described by:\n+\tDocumentation/devicetree/bindings/media/video-interfaces.txt\n+Their connections are modeled using the OF graph bindings specified in\n+\tDocumentation/devicetree/bindings/graph.txt.\n+\n+- video port 0 for the VOP input, the remote endpoint maybe vopb/vopl/vop\n+- video port 1 for either a panel or subsequent encoder\n+\n+the panel described by:\n+\tDocumentation/devicetree/bindings/display/panel/simple-panel.txt\n+Panel other required properties:\n+- ports for remote rgb output.\n+\n+Example:\n+\n+panel: panel {\n+\tcompatible = \"auo,b101ean01\";\n+\tenable-gpios = <&gpio7 21 GPIO_ACTIVE_HIGH>;\n+\n+\tports {\n+\t\tpanel_in_rgb: endpoint {\n+\t\t\tremote-endpoint = <&rgb_out_panel>;\n+\t\t};\n+\t};\n+};\n+\n+For Rockchip RV1108:\n+\n+\trgb: rgb {\n+\t\tcompatible = \"rockchip,rv1108-rgb\";\n+\t\tpinctrl-names = \"lcdc\";\n+\t\tpinctrl-0 = <&lcdc_ctl>;\n+\t\trgb-mode = \"p888\";\n+\n+\t\tports {\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\n+\t\t\trgb_in: port@0 {\n+\t\t\t\treg = <0>;\n+\t\t\t\t#address-cells = <1>;\n+\t\t\t\t#size-cells = <0>;\n+\n+\t\t\t\trgb_in_vop: endpoint {\n+\t\t\t\t\tremote-endpoint = <&vop_out_rgb>;\n+\t\t\t\t};\n+\t\t\t};\n+\n+\t\t\trgb_out: port@1 {\n+\t\t\t\treg = <1>;\n+\t\t\t\t#address-cells = <1>;\n+\t\t\t\t#size-cells = <0>;\n+\n+\t\t\t\trgb_out_panel: endpoint {\n+\t\t\t\t\tremote-endpoint = <&panel_in_rgb>;\n+\t\t\t\t};\n+\t\t\t};\n+\t\t};\n+\t};\n","prefixes":["v2","1/3"]}