{"id":816966,"url":"http://patchwork.ozlabs.org/api/patches/816966/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/1506007346-10037-13-git-send-email-jjhiblot@ti.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1506007346-10037-13-git-send-email-jjhiblot@ti.com>","list_archive_url":null,"date":"2017-09-21T15:22:15","name":"[U-Boot,12/23] mmc: omap_hsmmc: Add support to get pinctrl values and max frequency for different hw revisions","commit_ref":null,"pull_url":null,"state":"changes-requested","archived":false,"hash":"e0dd47ed0abe8f55e74bdb85ac4369a01edbf52c","submitter":{"id":70508,"url":"http://patchwork.ozlabs.org/api/people/70508/?format=json","name":"Jean-Jacques Hiblot","email":"jjhiblot@ti.com"},"delegate":{"id":3651,"url":"http://patchwork.ozlabs.org/api/users/3651/?format=json","username":"trini","first_name":"Tom","last_name":"Rini","email":"trini@ti.com"},"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/1506007346-10037-13-git-send-email-jjhiblot@ti.com/mbox/","series":[{"id":4414,"url":"http://patchwork.ozlabs.org/api/series/4414/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=4414","date":"2017-09-21T15:22:03","name":"mmc: omap5: Add support for UHS and HS200 modes","version":1,"mbox":"http://patchwork.ozlabs.org/series/4414/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/816966/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/816966/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=ti.com header.i=@ti.com header.b=\"SDI3/ZPs\";\n\tdkim-atps=neutral"],"Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xygZL0NHZz9t4Z\n\tfor ;\n\tFri, 22 Sep 2017 01:31:38 +1000 (AEST)","by lists.denx.de (Postfix, from userid 105)\n\tid C2B94C220AF; Thu, 21 Sep 2017 15:25:01 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 03E13C22040;\n\tThu, 21 Sep 2017 15:23:46 +0000 (UTC)","by lists.denx.de (Postfix, from userid 105)\n\tid 788CFC2203F; Thu, 21 Sep 2017 15:23:01 +0000 (UTC)","from lelnx194.ext.ti.com (lelnx194.ext.ti.com [198.47.27.80])\n\tby lists.denx.de (Postfix) with ESMTPS id 6F6FFC22020\n\tfor ; Thu, 21 Sep 2017 15:22:57 +0000 (UTC)","from dflxv15.itg.ti.com ([128.247.5.124])\n\tby lelnx194.ext.ti.com (8.15.1/8.15.1) with ESMTP id v8LFMtPC013941; \n\tThu, 21 Sep 2017 10:22:55 -0500","from DLEE105.ent.ti.com (dlee105.ent.ti.com [157.170.170.35])\n\tby dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v8LFMtTJ009527;\n\tThu, 21 Sep 2017 10:22:55 -0500","from DLEE102.ent.ti.com (157.170.170.32) by DLEE105.ent.ti.com\n\t(157.170.170.35) with Microsoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34;\n\tThu, 21 Sep 2017 10:22:54 -0500","from dflp33.itg.ti.com (10.64.6.16) by DLEE102.ent.ti.com\n\t(157.170.170.32) with Microsoft SMTP Server (version=TLS1_0,\n\tcipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend\n\tTransport; Thu, 21 Sep 2017 10:22:55 -0500","from localhost (ileax41-snat.itg.ti.com [10.172.224.153])\n\tby dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v8LFMsr0022934;\n\tThu, 21 Sep 2017 10:22:54 -0500"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_NONE,\n\tT_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com;\n\ts=ti-com-17Q1; t=1506007375;\n\tbh=rKP17F2MlPEGEoPgTLqhBifHPzoMTglj4VCrXkz6/RA=;\n\th=From:To:CC:Subject:Date:In-Reply-To:References;\n\tb=SDI3/ZPs7beepsJFT15Qgbt5ZDURtXO6AG8bUwYRfcis26VEmm54bDB2ZDQ9Rhro7\n\tJ4fMosbvyZWyEsey2y+v+tBCitwKykP7pvJBgPhsh9kZn3PdDtYkPnzu4pS9hlOxE+\n\toyZnWB0wghT1qIHr4bqD96cdACCEfJZQOGsh5Efs=","From":"Jean-Jacques Hiblot ","To":", , ,\n\t, ","Date":"Thu, 21 Sep 2017 17:22:15 +0200","Message-ID":"<1506007346-10037-13-git-send-email-jjhiblot@ti.com>","X-Mailer":"git-send-email 1.9.1","In-Reply-To":"<1506007346-10037-1-git-send-email-jjhiblot@ti.com>","References":"<1506007346-10037-1-git-send-email-jjhiblot@ti.com>","MIME-Version":"1.0","X-EXCLAIMER-MD-CONFIG":"e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180","Cc":"u-boot@lists.denx.de","Subject":"[U-Boot] [PATCH 12/23] mmc: omap_hsmmc: Add support to get pinctrl\n\tvalues and max frequency for different hw revisions","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "},"content":"From: Kishon Vijay Abraham I \n\nAM572x SR1.1 requires different IODelay values to be used than that used\nin AM572x SR2.0. These values are populated in device tree. Add\ncapability in omap_hsmmc driver to extract IOdelay values for different\nsilicon revision. The maximum frequency is also reduced when using a ES1.1.\nTo keep the ability to boot both revsions with the same dtb, those values\ncan be provided by the platform code.\n\nSigned-off-by: Kishon Vijay Abraham I \nSigned-off-by: Jean-Jacques Hiblot \n---\n arch/arm/include/asm/arch-omap5/sys_proto.h | 7 ++++\n arch/arm/include/asm/omap_mmc.h | 1 +\n drivers/mmc/omap_hsmmc.c | 58 ++++++++++++++++++++++-------\n 3 files changed, 52 insertions(+), 14 deletions(-)","diff":"diff --git a/arch/arm/include/asm/arch-omap5/sys_proto.h b/arch/arm/include/asm/arch-omap5/sys_proto.h\nindex ab0e7fa..d391ee5 100644\n--- a/arch/arm/include/asm/arch-omap5/sys_proto.h\n+++ b/arch/arm/include/asm/arch-omap5/sys_proto.h\n@@ -35,6 +35,12 @@ struct pad_conf_entry {\n \tu32 val;\n };\n \n+struct mmc_platform_fixups {\n+\tconst char *hw_rev;\n+\tu32 unsupported_caps;\n+\tu32 max_freq;\n+};\n+\n struct omap_sysinfo {\n \tchar *board_string;\n };\n@@ -70,6 +76,7 @@ void force_emif_self_refresh(void);\n void get_ioregs(const struct ctrl_ioregs **regs);\n void srcomp_enable(void);\n void setup_warmreset_time(void);\n+const struct mmc_platform_fixups *platform_fixups_mmc(uint32_t addr);\n \n static inline u32 div_round_up(u32 num, u32 den)\n {\ndiff --git a/arch/arm/include/asm/omap_mmc.h b/arch/arm/include/asm/omap_mmc.h\nindex 0893844..3073805 100644\n--- a/arch/arm/include/asm/omap_mmc.h\n+++ b/arch/arm/include/asm/omap_mmc.h\n@@ -70,6 +70,7 @@ struct omap_hsmmc_plat {\n \tstruct mmc mmc;\n \tbool cd_inverted;\n \tu32 controller_flags;\n+\tconst char *hw_rev;\n };\n \n /*\ndiff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c\nindex 67ba31e..a83c589 100644\n--- a/drivers/mmc/omap_hsmmc.c\n+++ b/drivers/mmc/omap_hsmmc.c\n@@ -96,6 +96,7 @@ struct omap_hsmmc_data {\n \tstruct omap_hsmmc_adma_desc *adma_desc_table;\n \tuint desc_slot;\n #endif\n+\tconst char *hw_rev;\n #ifdef CONFIG_IODELAY_RECALIBRATION\n \tstruct omap_hsmmc_pinctrl_state *default_pinctrl_state;\n \tstruct omap_hsmmc_pinctrl_state *hs_pinctrl_state;\n@@ -1362,6 +1363,7 @@ int omap_mmc_init(int dev_index, uint host_caps_mask, uint f_max, int cd_gpio,\n \tif ((get_cpu_family() == CPU_OMAP34XX) && (get_cpu_rev() <= CPU_3XX_ES21))\n \t\tcfg->b_max = 1;\n #endif\n+\n \tmmc = mmc_create(cfg, priv);\n \tif (mmc == NULL)\n \t\treturn -1;\n@@ -1581,20 +1583,28 @@ err_pinctrl_state:\n \treturn 0;\n }\n \n-#define OMAP_HSMMC_SETUP_PINCTRL(capmask, mode)\t\t\t\\\n-\tdo {\t\t\t\t\t\t\t\\\n-\t\tstruct omap_hsmmc_pinctrl_state *s;\t\t\\\n-\t\tif (!(cfg->host_caps & capmask))\t\t\\\n-\t\t\tbreak;\t\t\t\t\t\\\n-\t\t\t\t\t\t\t\t\\\n-\t\ts = omap_hsmmc_get_pinctrl_by_mode(mmc, #mode);\t\\\n-\t\tif (!s) {\t\t\t\t\t\\\n-\t\t\tdebug(\"%s: no pinctrl for %s\\n\",\t\\\n-\t\t\t mmc->dev->name, #mode);\t\t\\\n-\t\t\tcfg->host_caps &= ~(capmask);\t\t\\\n-\t\t} else {\t\t\t\t\t\\\n-\t\t\tpriv->mode##_pinctrl_state = s;\t\t\\\n-\t\t}\t\t\t\t\t\t\\\n+#define OMAP_HSMMC_SETUP_PINCTRL(capmask, mode)\t\t\t\t\\\n+\tdo {\t\t\t\t\t\t\t\t\\\n+\t\tstruct omap_hsmmc_pinctrl_state *s = NULL;\t\t\\\n+\t\tchar str[20];\t\t\t\t\t\t\\\n+\t\tif (!(cfg->host_caps & capmask))\t\t\t\\\n+\t\t\tbreak;\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\t\tif (priv->hw_rev) {\t\t\t\t\t\\\n+\t\t\tsprintf(str, \"%s-%s\", #mode, priv->hw_rev);\t\\\n+\t\t\ts = omap_hsmmc_get_pinctrl_by_mode(mmc, str);\t\\\n+\t\t}\t\t\t\t\t\t\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\t\tif (!s)\t\t\t\t\t\t\t\\\n+\t\t\ts = omap_hsmmc_get_pinctrl_by_mode(mmc, #mode);\t\\\n+\t\t\t\t\t\t\t\t\t\\\n+\t\tif (!s) {\t\t\t\t\t\t\\\n+\t\t\tdebug(\"%s: no pinctrl for %s\\n\",\t\t\\\n+\t\t\t mmc->dev->name, #mode);\t\t\t\\\n+\t\t\tcfg->host_caps &= ~(capmask);\t\t\t\\\n+\t\t} else {\t\t\t\t\t\t\\\n+\t\t\tpriv->mode##_pinctrl_state = s;\t\t\t\\\n+\t\t}\t\t\t\t\t\t\t\\\n \t} while (0)\n \n static int omap_hsmmc_get_pinctrl_state(struct mmc *mmc)\n@@ -1629,12 +1639,22 @@ static int omap_hsmmc_get_pinctrl_state(struct mmc *mmc)\n #endif\n \n #if CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)\n+#ifdef CONFIG_OMAP54XX\n+__weak const struct mmc_platform_fixups *platform_fixups_mmc(uint32_t addr)\n+{\n+\treturn NULL;\n+}\n+#endif\n+\n static int omap_hsmmc_ofdata_to_platdata(struct udevice *dev)\n {\n \tstruct omap_hsmmc_plat *plat = dev_get_platdata(dev);\n \tstruct omap_mmc_of_data *of_data = (void *)dev_get_driver_data(dev);\n \n \tstruct mmc_config *cfg = &plat->cfg;\n+#ifdef CONFIG_OMAP54XX\n+\tconst struct mmc_platform_fixups *fixups;\n+#endif\n \tconst void *fdt = gd->fdt_blob;\n \tint node = dev_of_offset(dev);\n \tint ret;\n@@ -1658,6 +1678,15 @@ static int omap_hsmmc_ofdata_to_platdata(struct udevice *dev)\n \tif (of_data)\n \t\tplat->controller_flags |= of_data->controller_flags;\n \n+#ifdef CONFIG_OMAP54XX\n+\tfixups = platform_fixups_mmc(devfdt_get_addr(dev));\n+\tif (fixups) {\n+\t\tplat->hw_rev = fixups->hw_rev;\n+\t\tcfg->host_caps &= ~fixups->unsupported_caps;\n+\t\tcfg->f_max = fixups->max_freq;\n+\t}\n+#endif\n+\n #ifdef OMAP_HSMMC_USE_GPIO\n \tplat->cd_inverted = fdtdec_get_bool(fdt, node, \"cd-inverted\");\n #endif\n@@ -1689,6 +1718,7 @@ static int omap_hsmmc_probe(struct udevice *dev)\n \tcfg->name = \"OMAP SD/MMC\";\n \tpriv->base_addr = plat->base_addr;\n \tpriv->controller_flags = plat->controller_flags;\n+\tpriv->hw_rev = plat->hw_rev;\n #ifdef OMAP_HSMMC_USE_GPIO\n \tpriv->cd_inverted = plat->cd_inverted;\n #endif\n","prefixes":["U-Boot","12/23"]}