{"id":816928,"url":"http://patchwork.ozlabs.org/api/patches/816928/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/1506005496-8635-6-git-send-email-jjhiblot@ti.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1506005496-8635-6-git-send-email-jjhiblot@ti.com>","list_archive_url":null,"date":"2017-09-21T14:51:36","name":"[U-Boot,v2,5/5] mmc: omap_hsmmc: Fix incorrect bit operations for disabling a bit","commit_ref":null,"pull_url":null,"state":"accepted","archived":false,"hash":"6c1a888ba842ffc721ca75add3e8bf341b7cd29d","submitter":{"id":70508,"url":"http://patchwork.ozlabs.org/api/people/70508/?format=json","name":"Jean-Jacques Hiblot","email":"jjhiblot@ti.com"},"delegate":{"id":3651,"url":"http://patchwork.ozlabs.org/api/users/3651/?format=json","username":"trini","first_name":"Tom","last_name":"Rini","email":"trini@ti.com"},"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/1506005496-8635-6-git-send-email-jjhiblot@ti.com/mbox/","series":[{"id":4406,"url":"http://patchwork.ozlabs.org/api/series/4406/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=4406","date":"2017-09-21T14:51:31","name":"mmc: omap_hsmmc: Add support for ADMA","version":2,"mbox":"http://patchwork.ozlabs.org/series/4406/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/816928/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/816928/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; 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a=rsa-sha256; c=relaxed/simple; d=ti.com;\n\ts=ti-com-17Q1; t=1506005518;\n\tbh=c8PJJGERbDCoJGEON2IYWWwRYrO6RKr48AOGE4O7s0Q=;\n\th=From:To:CC:Subject:Date:In-Reply-To:References;\n\tb=P/Lgf0AEeUBZR5/7yeiDNP2dLDolZtMghaPc7ywVlLN0mgTx+n8hegN7Uiq5AJrYo\n\tKK+sjPQMXAXrZwvXa//6F3MTA7G6qg3QG/1Ml+g+4lEtwmImauLPPTd/MGJzNhShSs\n\tKnjH+JD0WSZD3xwbLfsYlXK4mGMPfMYEVu4nfTRc=","From":"Jean-Jacques Hiblot ","To":", , ,\n\t","Date":"Thu, 21 Sep 2017 16:51:36 +0200","Message-ID":"<1506005496-8635-6-git-send-email-jjhiblot@ti.com>","X-Mailer":"git-send-email 1.9.1","In-Reply-To":"<1506005496-8635-1-git-send-email-jjhiblot@ti.com>","References":"<1506005496-8635-1-git-send-email-jjhiblot@ti.com>","MIME-Version":"1.0","X-EXCLAIMER-MD-CONFIG":"e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180","Cc":"u-boot@lists.denx.de","Subject":"[U-Boot] [PATCH v2 5/5] mmc: omap_hsmmc: Fix incorrect bit\n\toperations for disabling a bit","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "},"content":"From: Kishon Vijay Abraham I \n\nomap_hsmmc driver uses \"|\" in a couple of places for disabling a bit.\nWhile it's okay to use it in \"mmc_reg_out\" (since mmc_reg_out has a\n_mask_ argument to take care of resetting a bit), it's incorrectly used\nfor resetting flags in \"omap_hsmmc_send_cmd\".\n\nFix it here by using \"&= ~()\" to reset a bit.\n\nSigned-off-by: Kishon Vijay Abraham I \nSigned-off-by: Jean-Jacques Hiblot \n---\n arch/arm/include/asm/omap_mmc.h | 6 ++----\n drivers/mmc/omap_hsmmc.c | 7 ++++---\n 2 files changed, 6 insertions(+), 7 deletions(-)","diff":"diff --git a/arch/arm/include/asm/omap_mmc.h b/arch/arm/include/asm/omap_mmc.h\nindex 128cd81..bf9de9b 100644\n--- a/arch/arm/include/asm/omap_mmc.h\n+++ b/arch/arm/include/asm/omap_mmc.h\n@@ -90,10 +90,9 @@ struct omap_hsmmc_plat {\n #define DMA_MASTER\t\t\t(0x1 << 20)\n #define BLEN_512BYTESLEN\t\t(0x200 << 0)\n #define NBLK_STPCNT\t\t\t(0x0 << 16)\n-#define DE_DISABLE\t\t\t(0x0 << 0)\n-#define BCE_DISABLE\t\t\t(0x0 << 1)\n+#define DE_ENABLE\t\t\t(0x1 << 0)\n #define BCE_ENABLE\t\t\t(0x1 << 1)\n-#define ACEN_DISABLE\t\t\t(0x0 << 2)\n+#define ACEN_ENABLE\t\t\t(0x1 << 2)\n #define DDIR_OFFSET\t\t\t(4)\n #define DDIR_MASK\t\t\t(0x1 << 4)\n #define DDIR_WRITE\t\t\t(0x0 << 4)\n@@ -134,7 +133,6 @@ struct omap_hsmmc_plat {\n #define ICS_NOTREADY\t\t\t(0x0 << 1)\n #define ICE_OSCILLATE\t\t\t(0x1 << 0)\n #define CEN_MASK\t\t\t(0x1 << 2)\n-#define CEN_DISABLE\t\t\t(0x0 << 2)\n #define CEN_ENABLE\t\t\t(0x1 << 2)\n #define CLKD_OFFSET\t\t\t(6)\n #define CLKD_MASK\t\t\t(0x3FF << 6)\ndiff --git a/drivers/mmc/omap_hsmmc.c b/drivers/mmc/omap_hsmmc.c\nindex fcda0e2..1c3d1a5 100644\n--- a/drivers/mmc/omap_hsmmc.c\n+++ b/drivers/mmc/omap_hsmmc.c\n@@ -294,7 +294,7 @@ static int omap_hsmmc_init_setup(struct mmc *mmc)\n \n \tdsor = 240;\n \tmmc_reg_out(&mmc_base->sysctl, (ICE_MASK | DTO_MASK | CEN_MASK),\n-\t\t(ICE_STOP | DTO_15THDTO | CEN_DISABLE));\n+\t\t(ICE_STOP | DTO_15THDTO));\n \tmmc_reg_out(&mmc_base->sysctl, ICE_MASK | CLKD_MASK,\n \t\t(dsor << CLKD_OFFSET) | ICE_OSCILLATE);\n \tstart = get_timer(0);\n@@ -542,7 +542,8 @@ static int omap_hsmmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd,\n \n \t/* enable default flags */\n \tflags =\tflags | (CMD_TYPE_NORMAL | CICE_NOCHECK | CCCE_NOCHECK |\n-\t\t\tMSBS_SGLEBLK | ACEN_DISABLE | BCE_DISABLE | DE_DISABLE);\n+\t\t\tMSBS_SGLEBLK);\n+\tflags &= ~(ACEN_ENABLE | BCE_ENABLE | DE_ENABLE);\n \n \tif (cmd->resp_type & MMC_RSP_CRC)\n \t\tflags |= CCCE_CHECK;\n@@ -809,7 +810,7 @@ static int omap_hsmmc_set_ios(struct udevice *dev)\n \t}\n \n \tmmc_reg_out(&mmc_base->sysctl, (ICE_MASK | DTO_MASK | CEN_MASK),\n-\t\t\t\t(ICE_STOP | DTO_15THDTO | CEN_DISABLE));\n+\t\t\t\t(ICE_STOP | DTO_15THDTO));\n \n \tmmc_reg_out(&mmc_base->sysctl, ICE_MASK | CLKD_MASK,\n \t\t\t\t(dsor << CLKD_OFFSET) | ICE_OSCILLATE);\n","prefixes":["U-Boot","v2","5/5"]}