{"id":816895,"url":"http://patchwork.ozlabs.org/api/patches/816895/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/1506004213-22620-6-git-send-email-jjhiblot@ti.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1506004213-22620-6-git-send-email-jjhiblot@ti.com>","list_archive_url":null,"date":"2017-09-21T14:29:52","name":"[U-Boot,v2,05/26] mmc: add a function to read and test the ext csd (mmc >= 4)","commit_ref":"7382e691ca528785d9d3ca8b74c4811b4f0bfe07","pull_url":null,"state":"accepted","archived":false,"hash":"e790d37764b0c152bb80cba9df068bc7ef977d8f","submitter":{"id":70508,"url":"http://patchwork.ozlabs.org/api/people/70508/?format=json","name":"Jean-Jacques Hiblot","email":"jjhiblot@ti.com"},"delegate":{"id":12423,"url":"http://patchwork.ozlabs.org/api/users/12423/?format=json","username":"Jaehoon","first_name":"Jaehoon","last_name":"Chung","email":"jh80.chung@samsung.com"},"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/1506004213-22620-6-git-send-email-jjhiblot@ti.com/mbox/","series":[{"id":4400,"url":"http://patchwork.ozlabs.org/api/series/4400/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=4400","date":"2017-09-21T14:29:47","name":"mmc: Add support for HS200 and UHS modes","version":2,"mbox":"http://patchwork.ozlabs.org/series/4400/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/816895/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/816895/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n\tunprotected) header.d=ti.com header.i=@ti.com header.b=\"vYfoKfF7\";\n\tdkim-atps=neutral"],"Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xyfGp0Z6fz9s7g\n\tfor ;\n\tFri, 22 Sep 2017 00:33:06 +1000 (AEST)","by lists.denx.de (Postfix, from userid 105)\n\tid 7C97CC22005; Thu, 21 Sep 2017 14:31:50 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 3B115C22003;\n\tThu, 21 Sep 2017 14:30:47 +0000 (UTC)","by lists.denx.de (Postfix, from userid 105)\n\tid A4723C21E3B; Thu, 21 Sep 2017 14:30:38 +0000 (UTC)","from lelnx193.ext.ti.com (lelnx193.ext.ti.com [198.47.27.77])\n\tby lists.denx.de (Postfix) with ESMTPS id DA0F0C21FEB\n\tfor ; Thu, 21 Sep 2017 14:30:33 +0000 (UTC)","from dflxv15.itg.ti.com ([128.247.5.124])\n\tby lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id v8LEUTIL029433; \n\tThu, 21 Sep 2017 09:30:29 -0500","from DFLE104.ent.ti.com (dfle104.ent.ti.com [10.64.6.25])\n\tby dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id v8LEUTfV028311;\n\tThu, 21 Sep 2017 09:30:29 -0500","from DFLE110.ent.ti.com (10.64.6.31) by DFLE104.ent.ti.com\n\t(10.64.6.25) with Microsoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.1.845.34;\n\tThu, 21 Sep 2017 09:30:29 -0500","from dflp33.itg.ti.com (10.64.6.16) by DFLE110.ent.ti.com\n\t(10.64.6.31) with Microsoft SMTP Server (version=TLS1_0,\n\tcipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.845.34 via Frontend\n\tTransport; Thu, 21 Sep 2017 09:30:29 -0500","from localhost (ileax41-snat.itg.ti.com [10.172.224.153])\n\tby dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v8LEUS00000747;\n\tThu, 21 Sep 2017 09:30:28 -0500"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_NONE,\n\tT_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com;\n\ts=ti-com-17Q1; t=1506004229;\n\tbh=zNFgRsulMdlaYkL4jGz4ASH8Vj0SivCIg/mGNQw9bwE=;\n\th=From:To:CC:Subject:Date:In-Reply-To:References;\n\tb=vYfoKfF7ArSYd4tCjbZrNC4b7sD0SGwp4vxM2fVlKWjifcY5NLdrq0AHk0TlV8Eoy\n\titeXzaGTfxRJWWqDhzRnE8GDUaGXee+Mmh6/eCjnX8PLPiyvawcs2HDsuTCCx1GVP1\n\tN/BWMyzHAD/vVD/xzU3lxBTIOyFTpu3GC70168Go=","From":"Jean-Jacques Hiblot ","To":", , ,\n\t","Date":"Thu, 21 Sep 2017 16:29:52 +0200","Message-ID":"<1506004213-22620-6-git-send-email-jjhiblot@ti.com>","X-Mailer":"git-send-email 1.9.1","In-Reply-To":"<1506004213-22620-1-git-send-email-jjhiblot@ti.com>","References":"<1506004213-22620-1-git-send-email-jjhiblot@ti.com>","MIME-Version":"1.0","X-EXCLAIMER-MD-CONFIG":"e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180","Cc":"u-boot@lists.denx.de","Subject":"[U-Boot] [PATCH v2 05/26] mmc: add a function to read and test the\n\text csd (mmc >= 4)","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "},"content":"This will be reused later in the selection of high speed and ddr modes.\n\nSigned-off-by: Jean-Jacques Hiblot \nReviewed-by: Simon Glass \n---\n drivers/mmc/mmc.c | 53 +++++++++++++++++++++++++++++++++--------------------\n 1 file changed, 33 insertions(+), 20 deletions(-)","diff":"diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c\nindex cfdfd8d..d360a1a 100644\n--- a/drivers/mmc/mmc.c\n+++ b/drivers/mmc/mmc.c\n@@ -1146,10 +1146,39 @@ static int sd_select_bus_freq_width(struct mmc *mmc)\n \treturn 0;\n }\n \n-static int mmc_select_bus_freq_width(struct mmc *mmc)\n+/*\n+ * read the compare the part of ext csd that is constant.\n+ * This can be used to check that the transfer is working\n+ * as expected.\n+ */\n+static int mmc_read_and_compare_ext_csd(struct mmc *mmc)\n {\n-\tALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);\n+\tint err;\n \tconst u8 *ext_csd = mmc->ext_csd;\n+\tALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);\n+\n+\terr = mmc_send_ext_csd(mmc, test_csd);\n+\tif (err)\n+\t\treturn err;\n+\n+\t/* Only compare read only fields */\n+\tif (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]\n+\t\t== test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&\n+\t ext_csd[EXT_CSD_HC_WP_GRP_SIZE]\n+\t\t== test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&\n+\t ext_csd[EXT_CSD_REV]\n+\t\t== test_csd[EXT_CSD_REV] &&\n+\t ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]\n+\t\t== test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&\n+\t memcmp(&ext_csd[EXT_CSD_SEC_CNT],\n+\t\t &test_csd[EXT_CSD_SEC_CNT], 4) == 0)\n+\t\treturn 0;\n+\n+\treturn -EBADMSG;\n+}\n+\n+static int mmc_select_bus_freq_width(struct mmc *mmc)\n+{\n \t/* An array of possible bus widths in order of preference */\n \tstatic const unsigned int ext_csd_bits[] = {\n \t\tEXT_CSD_DDR_BUS_WIDTH_8,\n@@ -1221,25 +1250,9 @@ static int mmc_select_bus_freq_width(struct mmc *mmc)\n \t\tmmc->ddr_mode = (caps & MMC_MODE_DDR_52MHz) ? 1 : 0;\n \t\tmmc_set_bus_width(mmc, widths[idx]);\n \n-\t\terr = mmc_send_ext_csd(mmc, test_csd);\n-\n-\t\tif (err)\n-\t\t\tcontinue;\n-\n-\t\t/* Only compare read only fields */\n-\t\tif (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]\n-\t\t\t== test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&\n-\t\t ext_csd[EXT_CSD_HC_WP_GRP_SIZE]\n-\t\t\t== test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&\n-\t\t ext_csd[EXT_CSD_REV]\n-\t\t\t== test_csd[EXT_CSD_REV] &&\n-\t\t ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]\n-\t\t\t== test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&\n-\t\t memcmp(&ext_csd[EXT_CSD_SEC_CNT],\n-\t\t\t &test_csd[EXT_CSD_SEC_CNT], 4) == 0)\n+\t\terr = mmc_read_and_compare_ext_csd(mmc);\n+\t\tif (!err)\n \t\t\tbreak;\n-\n-\t\terr = -EBADMSG;\n \t}\n \n \tif (err)\n","prefixes":["U-Boot","v2","05/26"]}