{"id":816885,"url":"http://patchwork.ozlabs.org/api/patches/816885/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/1506003471-34551-5-git-send-email-david.wu@rock-chips.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1506003471-34551-5-git-send-email-david.wu@rock-chips.com>","list_archive_url":null,"date":"2017-09-21T14:17:49","name":"[U-Boot,4/6] net: gmac_rockchip: Define the gmac grf register struct at gmac_rockchip.c","commit_ref":null,"pull_url":null,"state":"superseded","archived":false,"hash":"02b6a0d86b14462a90fd98cce5e2c4cd72c38657","submitter":{"id":68083,"url":"http://patchwork.ozlabs.org/api/people/68083/?format=json","name":"David Wu","email":"david.wu@rock-chips.com"},"delegate":{"id":69486,"url":"http://patchwork.ozlabs.org/api/users/69486/?format=json","username":"ptomsich","first_name":"Philipp","last_name":"Tomsich","email":"philipp.tomsich@theobroma-systems.com"},"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/1506003471-34551-5-git-send-email-david.wu@rock-chips.com/mbox/","series":[{"id":4397,"url":"http://patchwork.ozlabs.org/api/series/4397/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=4397","date":"2017-09-21T14:17:45","name":"Add gmac support for rk3399-evb and rv1108-evb","version":1,"mbox":"http://patchwork.ozlabs.org/series/4397/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/816885/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/816885/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xydzr68V5z9s06\n\tfor ;\n\tFri, 22 Sep 2017 00:20:08 +1000 (AEST)","by lists.denx.de (Postfix, from userid 105)\n\tid 9A42BC21E57; Thu, 21 Sep 2017 14:19:32 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 51953C21E26;\n\tThu, 21 Sep 2017 14:19:10 +0000 (UTC)","by lists.denx.de (Postfix, from userid 105)\n\tid 02733C21F49; Thu, 21 Sep 2017 14:19:05 +0000 (UTC)","from lucky1.263xmail.com (lucky1.263xmail.com [211.157.147.130])\n\tby lists.denx.de (Postfix) with ESMTPS id 1FAA1C21F4B\n\tfor ; Thu, 21 Sep 2017 14:19:01 +0000 (UTC)","from david.wu?rock-chips.com (unknown [192.168.167.78])\n\tby lucky1.263xmail.com (Postfix) with ESMTP id 3D3731EF3A5;\n\tThu, 21 Sep 2017 22:18:56 +0800 (CST)","from localhost.localdomain (localhost [127.0.0.1])\n\tby smtp.263.net (Postfix) with ESMTPA id A5866395;\n\tThu, 21 Sep 2017 22:18:57 +0800 (CST)","from unknown (unknown [58.22.7.114])\n\tby smtp.263.net (Postfix) whith SMTP id 1312232309T;\n\tThu, 21 Sep 2017 22:18:59 +0800 (CST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de","X-Spam-Level":"**","X-Spam-Status":"No, score=3.0 required=5.0 tests=RCVD_IN_MSPIKE_BL,\n\tRCVD_IN_MSPIKE_L5,RCVD_IN_SORBS_WEB autolearn=no autolearn_force=no\n\tversion=3.4.0","X-263anti-spam":"KSV:0;","X-MAIL-GRAY":"1","X-MAIL-DELIVERY":"0","X-KSVirus-check":"0","X-ABS-CHECKED":"4","X-RL-SENDER":"david.wu@rock-chips.com","X-FST-TO":"philipp.tomsich@theobroma-systems.com","X-SENDER-IP":"58.22.7.114","X-LOGIN-NAME":"david.wu@rock-chips.com","X-UNIQUE-TAG":"<838d935b1a7b2b8cac793e0ea0d518d0>","X-ATTACHMENT-NUM":"0","X-SENDER":"wdc@rock-chips.com","X-DNS-TYPE":"0","From":"David Wu ","To":"philipp.tomsich@theobroma-systems.com,\n\tsjg@chromium.org","Date":"Thu, 21 Sep 2017 22:17:49 +0800","Message-Id":"<1506003471-34551-5-git-send-email-david.wu@rock-chips.com>","X-Mailer":"git-send-email 2.7.4","In-Reply-To":"<1506003471-34551-1-git-send-email-david.wu@rock-chips.com>","References":"<1506003471-34551-1-git-send-email-david.wu@rock-chips.com>","Cc":"huangtao@rock-chips.com, Joe Hershberger ,\n\tu-boot@lists.denx.de, David Wu ,\n\tandy.yan@rock-chips.com, chenjh@rock-chips.com","Subject":"[U-Boot] [PATCH 4/6] net: gmac_rockchip: Define the gmac grf\n\tregister struct at gmac_rockchip.c","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","MIME-Version":"1.0","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "},"content":"If we include both the rk3288_grf.h and rv1108_grf.h, there is a\nnumber of compiling error for redefinition. So we define the reg\nstructs of mac_grf at gmac_rockchip.c. Remove the rk**_grf.h files,\ngive them own grf offset for their use.\n\nSigned-off-by: David Wu \n---\n\n drivers/net/gmac_rockchip.c | 144 +++++++++++++++++++++++++++++++++++---------\n 1 file changed, 116 insertions(+), 28 deletions(-)","diff":"diff --git a/drivers/net/gmac_rockchip.c b/drivers/net/gmac_rockchip.c\nindex 586ccbf..5f8f0cd 100644\n--- a/drivers/net/gmac_rockchip.c\n+++ b/drivers/net/gmac_rockchip.c\n@@ -15,9 +15,6 @@\n #include \n #include \n #include \n-#include \n-#include \n-#include \n #include \n #include \n #include \"designware.h\"\n@@ -31,15 +28,37 @@ DECLARE_GLOBAL_DATA_PTR;\n */\n struct gmac_rockchip_platdata {\n \tstruct dw_eth_pdata dw_eth_pdata;\n+\tvoid *grf;\n \tint tx_delay;\n \tint rx_delay;\n };\n \n struct rk_gmac_ops {\n-\tint (*fix_mac_speed)(struct dw_eth_dev *priv);\n+\tint (*fix_mac_speed)(struct gmac_rockchip_platdata *pdata,\n+\t\t\t struct dw_eth_dev *priv);\n \tvoid (*set_to_rgmii)(struct gmac_rockchip_platdata *pdata);\n };\n \n+struct gmac_rockchip_driver_data {\n+\tconst struct rk_gmac_ops *ops;\n+\tunsigned int grf_offset;\n+};\n+\n+struct rk3288_mac_grf {\n+\tu32 soc_con1;\n+\tu32 reserved;\n+\tu32 soc_con3;\n+};\n+\n+struct rk3368_mac_grf {\n+\tu32 soc_con15;\n+\tu32 soc_con16;\n+};\n+\n+struct rk3399_mac_grf {\n+\tu32 soc_con5;\n+\tu32 soc_con6;\n+};\n \n static int gmac_rockchip_ofdata_to_platdata(struct udevice *dev)\n {\n@@ -58,10 +77,18 @@ static int gmac_rockchip_ofdata_to_platdata(struct udevice *dev)\n \treturn designware_eth_ofdata_to_platdata(dev);\n }\n \n-static int rk3288_gmac_fix_mac_speed(struct dw_eth_dev *priv)\n+static int rk3288_gmac_fix_mac_speed(struct gmac_rockchip_platdata *pdata,\n+\t\t\t\t struct dw_eth_dev *priv)\n {\n-\tstruct rk3288_grf *grf;\n+\tstruct rk3288_mac_grf *grf = (struct rk3288_mac_grf *)pdata->grf;\n \tint clk;\n+\tenum {\n+\t\tRK3288_GMAC_CLK_SEL_SHIFT = 12,\n+\t\tRK3288_GMAC_CLK_SEL_MASK = GENMASK(13, 12),\n+\t\tRK3288_GMAC_CLK_SEL_125M = 0 << 12,\n+\t\tRK3288_GMAC_CLK_SEL_25M = 3 << 12,\n+\t\tRK3288_GMAC_CLK_SEL_2_5M = 2 << 12,\n+\t};\n \n \tswitch (priv->phydev->speed) {\n \tcase 10:\n@@ -78,15 +105,15 @@ static int rk3288_gmac_fix_mac_speed(struct dw_eth_dev *priv)\n \t\treturn -EINVAL;\n \t}\n \n-\tgrf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);\n \trk_clrsetreg(&grf->soc_con1, RK3288_GMAC_CLK_SEL_MASK, clk);\n \n \treturn 0;\n }\n \n-static int rk3368_gmac_fix_mac_speed(struct dw_eth_dev *priv)\n+static int rk3368_gmac_fix_mac_speed(struct gmac_rockchip_platdata *pdata,\n+\t\t\t\t struct dw_eth_dev *priv)\n {\n-\tstruct rk3368_grf *grf;\n+\tstruct rk3368_mac_grf *grf = (struct rk3368_mac_grf *)pdata->grf;\n \tint clk;\n \tenum {\n \t\tRK3368_GMAC_CLK_SEL_2_5M = 2 << 4,\n@@ -110,16 +137,22 @@ static int rk3368_gmac_fix_mac_speed(struct dw_eth_dev *priv)\n \t\treturn -EINVAL;\n \t}\n \n-\tgrf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);\n \trk_clrsetreg(&grf->soc_con15, RK3368_GMAC_CLK_SEL_MASK, clk);\n \n \treturn 0;\n }\n \n-static int rk3399_gmac_fix_mac_speed(struct dw_eth_dev *priv)\n+static int rk3399_gmac_fix_mac_speed(struct gmac_rockchip_platdata *pdata,\n+\t\t\t\t struct dw_eth_dev *priv)\n {\n-\tstruct rk3399_grf_regs *grf;\n+\tstruct rk3399_mac_grf *grf = (struct rk3399_mac_grf *)pdata->grf;\n \tint clk;\n+\tenum {\n+\t\tRK3399_GMAC_CLK_SEL_MASK = GENMASK(6, 4),\n+\t\tRK3399_GMAC_CLK_SEL_125M = 0 << 4,\n+\t\tRK3399_GMAC_CLK_SEL_25M\t = 3 << 4,\n+\t\tRK3399_GMAC_CLK_SEL_2_5M = 2 << 4,\n+\t};\n \n \tswitch (priv->phydev->speed) {\n \tcase 10:\n@@ -136,7 +169,6 @@ static int rk3399_gmac_fix_mac_speed(struct dw_eth_dev *priv)\n \t\treturn -EINVAL;\n \t}\n \n-\tgrf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);\n \trk_clrsetreg(&grf->soc_con5, RK3399_GMAC_CLK_SEL_MASK, clk);\n \n \treturn 0;\n@@ -144,9 +176,31 @@ static int rk3399_gmac_fix_mac_speed(struct dw_eth_dev *priv)\n \n static void rk3288_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)\n {\n-\tstruct rk3288_grf *grf;\n+\tstruct rk3288_mac_grf *grf = (struct rk3288_mac_grf *)pdata->grf;\n+\tenum {\n+\t\tRK3288_RMII_MODE_SHIFT = 14,\n+\t\tRK3288_RMII_MODE_MASK = BIT(14),\n+\n+\t\tRK3288_GMAC_PHY_INTF_SEL_SHIFT = 6,\n+\t\tRK3288_GMAC_PHY_INTF_SEL_MASK = GENMASK(8, 6),\n+\t\tRK3288_GMAC_PHY_INTF_SEL_RGMII = BIT(6),\n+\t};\n+\tenum {\n+\t\tRK3288_RXCLK_DLY_ENA_GMAC_MASK = BIT(15),\n+\t\tRK3288_RXCLK_DLY_ENA_GMAC_DISABLE = 0,\n+\t\tRK3288_RXCLK_DLY_ENA_GMAC_ENABLE = BIT(15),\n+\n+\t\tRK3288_TXCLK_DLY_ENA_GMAC_MASK = BIT(14),\n+\t\tRK3288_TXCLK_DLY_ENA_GMAC_DISABLE = 0,\n+\t\tRK3288_TXCLK_DLY_ENA_GMAC_ENABLE = BIT(14),\n+\n+\t\tRK3288_CLK_RX_DL_CFG_GMAC_SHIFT = 0x7,\n+\t\tRK3288_CLK_RX_DL_CFG_GMAC_MASK = GENMASK(13, 7),\n+\n+\t\tRK3288_CLK_TX_DL_CFG_GMAC_SHIFT = 0x0,\n+\t\tRK3288_CLK_TX_DL_CFG_GMAC_MASK = GENMASK(6, 0),\n+\t};\n \n-\tgrf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);\n \trk_clrsetreg(&grf->soc_con1,\n \t\t RK3288_RMII_MODE_MASK | RK3288_GMAC_PHY_INTF_SEL_MASK,\n \t\t RK3288_GMAC_PHY_INTF_SEL_RGMII);\n@@ -164,7 +218,7 @@ static void rk3288_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)\n \n static void rk3368_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)\n {\n-\tstruct rk3368_grf *grf;\n+\tstruct rk3368_mac_grf *grf = (struct rk3368_mac_grf *)pdata->grf;\n \tenum {\n \t\tRK3368_GMAC_PHY_INTF_SEL_RGMII = 1 << 9,\n \t\tRK3368_GMAC_PHY_INTF_SEL_MASK = GENMASK(11, 9),\n@@ -184,7 +238,6 @@ static void rk3368_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)\n \t\tRK3368_CLK_TX_DL_CFG_GMAC_MASK = GENMASK(6, 0),\n \t};\n \n-\tgrf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);\n \trk_clrsetreg(&grf->soc_con15,\n \t\t RK3368_RMII_MODE_MASK | RK3368_GMAC_PHY_INTF_SEL_MASK,\n \t\t RK3368_GMAC_PHY_INTF_SEL_RGMII);\n@@ -202,9 +255,24 @@ static void rk3368_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)\n \n static void rk3399_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)\n {\n-\tstruct rk3399_grf_regs *grf;\n-\n-\tgrf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);\n+\tstruct rk3399_mac_grf *grf = (struct rk3399_mac_grf *)pdata->grf;\n+\tenum {\n+\t\tRK3399_GMAC_PHY_INTF_SEL_MASK = GENMASK(11, 9),\n+\t\tRK3399_GMAC_PHY_INTF_SEL_RGMII = 1 << 9,\n+\t\tRK3399_GMAC_PHY_INTF_SEL_RMII = 4 << 9,\n+\t};\n+\tenum {\n+\t\tRK3399_RXCLK_DLY_ENA_GMAC_MASK = BIT(15),\n+\t\tRK3399_RXCLK_DLY_ENA_GMAC_DISABLE = 0,\n+\t\tRK3399_RXCLK_DLY_ENA_GMAC_ENABLE = BIT(15),\n+\t\tRK3399_TXCLK_DLY_ENA_GMAC_MASK = BIT(7),\n+\t\tRK3399_TXCLK_DLY_ENA_GMAC_DISABLE = 0,\n+\t\tRK3399_TXCLK_DLY_ENA_GMAC_ENABLE = BIT(7),\n+\t\tRK3399_CLK_RX_DL_CFG_GMAC_SHIFT = 8,\n+\t\tRK3399_CLK_RX_DL_CFG_GMAC_MASK = GENMASK(14, 8),\n+\t\tRK3399_CLK_TX_DL_CFG_GMAC_SHIFT = 0,\n+\t\tRK3399_CLK_TX_DL_CFG_GMAC_MASK = GENMASK(6, 0),\n+\t};\n \n \trk_clrsetreg(&grf->soc_con5,\n \t\t RK3399_GMAC_PHY_INTF_SEL_MASK,\n@@ -224,8 +292,9 @@ static void rk3399_gmac_set_to_rgmii(struct gmac_rockchip_platdata *pdata)\n static int gmac_rockchip_probe(struct udevice *dev)\n {\n \tstruct gmac_rockchip_platdata *pdata = dev_get_platdata(dev);\n-\tstruct rk_gmac_ops *ops =\n-\t\t(struct rk_gmac_ops *)dev_get_driver_data(dev);\n+\tstruct gmac_rockchip_driver_data *data =\n+\t\t(struct gmac_rockchip_driver_data *)dev_get_driver_data(dev);\n+\tconst struct rk_gmac_ops *ops = data->ops;\n \tstruct clk clk;\n \tint ret;\n \n@@ -238,6 +307,9 @@ static int gmac_rockchip_probe(struct udevice *dev)\n \tif (ret)\n \t\treturn ret;\n \n+\tpdata->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF) +\n+\t\t data->grf_offset;\n+\n \t/* Set to RGMII mode */\n \tops->set_to_rgmii(pdata);\n \n@@ -248,14 +320,15 @@ static int gmac_rockchip_eth_start(struct udevice *dev)\n {\n \tstruct eth_pdata *pdata = dev_get_platdata(dev);\n \tstruct dw_eth_dev *priv = dev_get_priv(dev);\n-\tstruct rk_gmac_ops *ops =\n-\t\t(struct rk_gmac_ops *)dev_get_driver_data(dev);\n+\tstruct gmac_rockchip_driver_data *data =\n+\t (struct gmac_rockchip_driver_data *)dev_get_driver_data(dev);\n+\tconst struct rk_gmac_ops *ops = data->ops;\n \tint ret;\n \n \tret = designware_eth_init(priv, pdata->enetaddr);\n \tif (ret)\n \t\treturn ret;\n-\tret = ops->fix_mac_speed(priv);\n+\tret = ops->fix_mac_speed((struct gmac_rockchip_platdata *)pdata, priv);\n \tif (ret)\n \t\treturn ret;\n \tret = designware_eth_enable(priv);\n@@ -279,23 +352,38 @@ const struct rk_gmac_ops rk3288_gmac_ops = {\n \t.set_to_rgmii = rk3288_gmac_set_to_rgmii,\n };\n \n+const struct gmac_rockchip_driver_data rk3288_gmac_data = {\n+\t.ops\t\t= &rk3288_gmac_ops,\n+\t.grf_offset\t= 0x248,\n+};\n+\n const struct rk_gmac_ops rk3368_gmac_ops = {\n \t.fix_mac_speed = rk3368_gmac_fix_mac_speed,\n \t.set_to_rgmii = rk3368_gmac_set_to_rgmii,\n };\n \n+const struct gmac_rockchip_driver_data rk3368_gmac_data = {\n+\t.ops\t\t= &rk3368_gmac_ops,\n+\t.grf_offset\t= 0x43c,\n+};\n+\n const struct rk_gmac_ops rk3399_gmac_ops = {\n \t.fix_mac_speed = rk3399_gmac_fix_mac_speed,\n \t.set_to_rgmii = rk3399_gmac_set_to_rgmii,\n };\n \n+const struct gmac_rockchip_driver_data rk3399_gmac_data = {\n+\t.ops\t\t= &rk3399_gmac_ops,\n+\t.grf_offset\t= 0xc214,\n+};\n+\n static const struct udevice_id rockchip_gmac_ids[] = {\n \t{ .compatible = \"rockchip,rk3288-gmac\",\n-\t .data = (ulong)&rk3288_gmac_ops },\n+\t .data = (ulong)&rk3288_gmac_data },\n \t{ .compatible = \"rockchip,rk3368-gmac\",\n-\t .data = (ulong)&rk3368_gmac_ops },\n+\t .data = (ulong)&rk3368_gmac_data },\n \t{ .compatible = \"rockchip,rk3399-gmac\",\n-\t .data = (ulong)&rk3399_gmac_ops },\n+\t .data = (ulong)&rk3399_gmac_data },\n \t{ }\n };\n \n","prefixes":["U-Boot","4/6"]}