{"id":816818,"url":"http://patchwork.ozlabs.org/api/patches/816818/?format=json","web_url":"http://patchwork.ozlabs.org/project/netdev/patch/1505992913-107256-7-git-send-email-linyunsheng@huawei.com/","project":{"id":7,"url":"http://patchwork.ozlabs.org/api/projects/7/?format=json","name":"Linux network development","link_name":"netdev","list_id":"netdev.vger.kernel.org","list_email":"netdev@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1505992913-107256-7-git-send-email-linyunsheng@huawei.com>","list_archive_url":null,"date":"2017-09-21T11:21:49","name":"[net-next,06/10] net: hns3: Add some interface for the support of DCB feature","commit_ref":null,"pull_url":null,"state":"changes-requested","archived":true,"hash":"6f0ca675fb3066ca612d9309db43c39a6d2d286d","submitter":{"id":71804,"url":"http://patchwork.ozlabs.org/api/people/71804/?format=json","name":"Yunsheng Lin","email":"linyunsheng@huawei.com"},"delegate":{"id":34,"url":"http://patchwork.ozlabs.org/api/users/34/?format=json","username":"davem","first_name":"David","last_name":"Miller","email":"davem@davemloft.net"},"mbox":"http://patchwork.ozlabs.org/project/netdev/patch/1505992913-107256-7-git-send-email-linyunsheng@huawei.com/mbox/","series":[{"id":4360,"url":"http://patchwork.ozlabs.org/api/series/4360/?format=json","web_url":"http://patchwork.ozlabs.org/project/netdev/list/?series=4360","date":"2017-09-21T11:21:52","name":"Add support for DCB feature in hns3 driver","version":1,"mbox":"http://patchwork.ozlabs.org/series/4360/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/816818/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/816818/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"patchwork-incoming@ozlabs.org","Delivered-To":"patchwork-incoming@ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=netdev-owner@vger.kernel.org;\n\treceiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xyZ6V4CDjz9t3v\n\tfor ;\n\tThu, 21 Sep 2017 21:25:38 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751940AbdIULZG (ORCPT );\n\tThu, 21 Sep 2017 07:25:06 -0400","from szxga04-in.huawei.com ([45.249.212.190]:6952 \"EHLO\n\tszxga04-in.huawei.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751617AbdIULWV (ORCPT\n\t); Thu, 21 Sep 2017 07:22:21 -0400","from 172.30.72.60 (EHLO DGGEMS408-HUB.china.huawei.com)\n\t([172.30.72.60])\n\tby dggrg04-dlp.huawei.com (MOS 4.4.6-GA FastPath queued)\n\twith ESMTP id DHR44639; Thu, 21 Sep 2017 19:22:19 +0800 (CST)","from localhost.localdomain (10.67.212.75) by\n\tDGGEMS408-HUB.china.huawei.com (10.3.19.208) with Microsoft SMTP\n\tServer id 14.3.301.0; Thu, 21 Sep 2017 19:22:09 +0800"],"From":"Yunsheng Lin ","To":"","CC":", ,\n\t, ,\n\t, ,\n\t, ,\n\t, ,\n\t, ","Subject":"[PATCH net-next 06/10] net: hns3: Add some interface for the\n\tsupport of DCB feature","Date":"Thu, 21 Sep 2017 19:21:49 +0800","Message-ID":"<1505992913-107256-7-git-send-email-linyunsheng@huawei.com>","X-Mailer":"git-send-email 1.9.1","In-Reply-To":"<1505992913-107256-1-git-send-email-linyunsheng@huawei.com>","References":"<1505992913-107256-1-git-send-email-linyunsheng@huawei.com>","MIME-Version":"1.0","Content-Type":"text/plain","X-Originating-IP":"[10.67.212.75]","X-CFilter-Loop":"Reflected","X-Mirapoint-Virus-RAPID-Raw":"score=unknown(0),\n\trefid=str=0001.0A090204.59C3A0EC.00A6, ss=1, re=0.000, recu=0.000,\n\treip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0,\n\tso=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32","X-Mirapoint-Loop-Id":"290ed57741c3db4eeabe3167dbdb0b02","Sender":"netdev-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"netdev@vger.kernel.org"},"content":"This patch add some interface and export some interface from\nhclge_tm and hclgc_main to support the upcoming DCB feature.\n\nSigned-off-by: Yunsheng Lin \n---\n .../ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 3 +-\n .../ethernet/hisilicon/hns3/hns3pf/hclge_main.h | 3 ++\n .../net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c | 48 ++++++++++++++++++++--\n .../net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h | 6 +++\n 4 files changed, 55 insertions(+), 5 deletions(-)","diff":"diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c\nindex c27b460..49a11d5 100644\n--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c\n+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c\n@@ -30,7 +30,6 @@\n #define HCLGE_64BIT_STATS_FIELD_OFF(f) (offsetof(struct hclge_64_bit_stats, f))\n #define HCLGE_32BIT_STATS_FIELD_OFF(f) (offsetof(struct hclge_32_bit_stats, f))\n \n-static int hclge_rss_init_hw(struct hclge_dev *hdev);\n static int hclge_set_mta_filter_mode(struct hclge_dev *hdev,\n \t\t\t\t enum hclge_mta_dmac_sel_type mta_mac_sel,\n \t\t\t\t bool enable);\n@@ -2660,7 +2659,7 @@ static int hclge_get_tc_size(struct hnae3_handle *handle)\n \treturn hdev->rss_size_max;\n }\n \n-static int hclge_rss_init_hw(struct hclge_dev *hdev)\n+int hclge_rss_init_hw(struct hclge_dev *hdev)\n {\n \tconst u8 hfunc = HCLGE_RSS_HASH_ALGO_TOEPLITZ;\n \tstruct hclge_vport *vport = hdev->vport;\ndiff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h\nindex 4fc36f0..394b587 100644\n--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h\n+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h\n@@ -515,4 +515,7 @@ static inline int hclge_get_queue_id(struct hnae3_queue *queue)\n int hclge_cfg_mac_speed_dup(struct hclge_dev *hdev, int speed, u8 duplex);\n int hclge_set_vf_vlan_common(struct hclge_dev *vport, int vfid,\n \t\t\t bool is_kill, u16 vlan, u8 qos, __be16 proto);\n+\n+int hclge_buffer_alloc(struct hclge_dev *hdev);\n+int hclge_rss_init_hw(struct hclge_dev *hdev);\n #endif\ndiff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c\nindex 2bc7d63c..e158e66 100644\n--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c\n+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c\n@@ -884,10 +884,14 @@ static int hclge_tm_pri_dwrr_cfg(struct hclge_dev *hdev)\n \treturn 0;\n }\n \n-static int hclge_tm_map_cfg(struct hclge_dev *hdev)\n+int hclge_tm_map_cfg(struct hclge_dev *hdev)\n {\n \tint ret;\n \n+\tret = hclge_up_to_tc_map(hdev);\n+\tif (ret)\n+\t\treturn ret;\n+\n \tret = hclge_tm_pg_to_pri_map(hdev);\n \tif (ret)\n \t\treturn ret;\n@@ -995,7 +999,7 @@ static int hclge_tm_lvl34_schd_mode_cfg(struct hclge_dev *hdev)\n \treturn 0;\n }\n \n-static int hclge_tm_schd_mode_hw(struct hclge_dev *hdev)\n+int hclge_tm_schd_mode_hw(struct hclge_dev *hdev)\n {\n \tint ret;\n \n@@ -1093,7 +1097,45 @@ int hclge_pause_setup_hw(struct hclge_dev *hdev)\n \t\t\treturn ret;\n \t}\n \n-\treturn hclge_up_to_tc_map(hdev);\n+\treturn 0;\n+}\n+\n+int hclge_tm_prio_tc_info_update(struct hclge_dev *hdev, u8 *prio_tc)\n+{\n+\tstruct hclge_vport *vport = hdev->vport;\n+\tstruct hnae3_knic_private_info *kinfo;\n+\tu32 i, k;\n+\n+\tfor (i = 0; i < HNAE3_MAX_USER_PRIO; i++) {\n+\t\tif (prio_tc[i] >= hdev->tm_info.num_tc)\n+\t\t\treturn -EINVAL;\n+\t\thdev->tm_info.prio_tc[i] = prio_tc[i];\n+\n+\t\tfor (k = 0; k < hdev->num_alloc_vport; k++) {\n+\t\t\tkinfo = &vport[k].nic.kinfo;\n+\t\t\tkinfo->prio_tc[i] = prio_tc[i];\n+\t\t}\n+\t}\n+\treturn 0;\n+}\n+\n+void hclge_tm_schd_info_update(struct hclge_dev *hdev, u8 num_tc)\n+{\n+\tu8 i, bit_map = 0;\n+\n+\thdev->tm_info.num_tc = num_tc;\n+\n+\tfor (i = 0; i < hdev->tm_info.num_tc; i++)\n+\t\tbit_map |= BIT(i);\n+\n+\tif (!bit_map) {\n+\t\tbit_map = 1;\n+\t\thdev->tm_info.num_tc = 1;\n+\t}\n+\n+\thdev->hw_tc_map = bit_map;\n+\n+\thclge_tm_schd_info_init(hdev);\n }\n \n int hclge_tm_init_hw(struct hclge_dev *hdev)\ndiff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h\nindex 19a01e4..bf59961 100644\n--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h\n+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h\n@@ -112,4 +112,10 @@ struct hclge_port_shapping_cmd {\n \n int hclge_tm_schd_init(struct hclge_dev *hdev);\n int hclge_pause_setup_hw(struct hclge_dev *hdev);\n+int hclge_tm_schd_mode_hw(struct hclge_dev *hdev);\n+int hclge_tm_prio_tc_info_update(struct hclge_dev *hdev, u8 *prio_tc);\n+void hclge_tm_schd_info_update(struct hclge_dev *hdev, u8 num_tc);\n+int hclge_tm_dwrr_cfg(struct hclge_dev *hdev);\n+int hclge_tm_map_cfg(struct hclge_dev *hdev);\n+int hclge_tm_init_hw(struct hclge_dev *hdev);\n #endif\n","prefixes":["net-next","06/10"]}