{"id":816744,"url":"http://patchwork.ozlabs.org/api/patches/816744/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/1505981969-49480-4-git-send-email-philipp.tomsich@theobroma-systems.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1505981969-49480-4-git-send-email-philipp.tomsich@theobroma-systems.com>","list_archive_url":null,"date":"2017-09-21T08:19:26","name":"[U-Boot,v3,3/6] arm: provide a PCS-compliant setjmp implementation","commit_ref":null,"pull_url":null,"state":"superseded","archived":false,"hash":"9d890c9824ec006caed33f2970e31770bda3fbc7","submitter":{"id":53488,"url":"http://patchwork.ozlabs.org/api/people/53488/?format=json","name":"Philipp Tomsich","email":"philipp.tomsich@theobroma-systems.com"},"delegate":{"id":69486,"url":"http://patchwork.ozlabs.org/api/users/69486/?format=json","username":"ptomsich","first_name":"Philipp","last_name":"Tomsich","email":"philipp.tomsich@theobroma-systems.com"},"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/1505981969-49480-4-git-send-email-philipp.tomsich@theobroma-systems.com/mbox/","series":[{"id":4327,"url":"http://patchwork.ozlabs.org/api/series/4327/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=4327","date":"2017-09-21T08:19:25","name":"rockchip: back-to-bootrom: replace assembly-implementation with C-code","version":3,"mbox":"http://patchwork.ozlabs.org/series/4327/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/816744/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/816744/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xyV3n4VZ5z9t3C\n\tfor ;\n\tThu, 21 Sep 2017 18:23:01 +1000 (AEST)","by lists.denx.de (Postfix, from userid 105)\n\tid 60F89C21F94; Thu, 21 Sep 2017 08:21:51 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 0EE93C21FCD;\n\tThu, 21 Sep 2017 08:20:10 +0000 (UTC)","by lists.denx.de (Postfix, from userid 105)\n\tid C58DBC21FC9; Thu, 21 Sep 2017 08:19:52 +0000 (UTC)","from mail.theobroma-systems.com (vegas.theobroma-systems.com\n\t[144.76.126.164])\n\tby lists.denx.de (Postfix) with ESMTPS id A14AAC21F6C\n\tfor ; Thu, 21 Sep 2017 08:19:47 +0000 (UTC)","from [86.59.122.178] (port=36209 helo=android.lan)\n\tby mail.theobroma-systems.com with esmtpsa\n\t(TLS1.2:RSA_AES_128_CBC_SHA256:128)\n\t(Exim 4.80) (envelope-from )\n\tid 1duwhz-0003Re-Bs; Thu, 21 Sep 2017 10:19:43 +0200"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=0.0 required=5.0 tests=none autolearn=unavailable\n\tautolearn_force=no version=3.4.0","From":"Philipp Tomsich ","To":"u-boot@lists.denx.de","Date":"Thu, 21 Sep 2017 10:19:26 +0200","Message-Id":"<1505981969-49480-4-git-send-email-philipp.tomsich@theobroma-systems.com>","X-Mailer":"git-send-email 2.1.4","In-Reply-To":"<1505981969-49480-1-git-send-email-philipp.tomsich@theobroma-systems.com>","References":"<1505981969-49480-1-git-send-email-philipp.tomsich@theobroma-systems.com>","Cc":"Stefan Roese , Andre Przywara ,\n\tKlaus Goger ,\n\tAndy Yan , Jagan Teki ","Subject":"[U-Boot] [PATCH v3 3/6] arm: provide a PCS-compliant setjmp\n\timplementation","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","MIME-Version":"1.0","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "},"content":"The previous setjmp-implementation (as a static inline function that\ncontained an 'asm volatile' sequence) was extremely fragile: (some\nversions of) GCC optimised the set of registers. One critical example\nwas the removal of 'r9' from the clobber list, if -ffixed-reg9 was\nsupplied.\n\nTo increase robustness and ensure PCS-compliant behaviour, the setjmp\nand longjmp implementation are now in assembly and closely match what\none would expect to find in a libc implementation.\n\nSigned-off-by: Philipp Tomsich \nTested-by: Andy Yan \n\n---\n\nChanges in v3:\n- converted setjmp/longjmp from inline-assembly to separate .S files\n to improve predicatability if emitted code\n\nChanges in v2: None\n\n arch/arm/include/asm/setjmp.h | 94 ++++++-------------------------------------\n arch/arm/lib/Makefile | 6 +++\n arch/arm/lib/setjmp.S | 37 +++++++++++++++++\n arch/arm/lib/setjmp_aarch64.S | 42 +++++++++++++++++++\n 4 files changed, 98 insertions(+), 81 deletions(-)\n create mode 100644 arch/arm/lib/setjmp.S\n create mode 100644 arch/arm/lib/setjmp_aarch64.S","diff":"diff --git a/arch/arm/include/asm/setjmp.h b/arch/arm/include/asm/setjmp.h\nindex c3399a7..517beeb 100644\n--- a/arch/arm/include/asm/setjmp.h\n+++ b/arch/arm/include/asm/setjmp.h\n@@ -1,6 +1,6 @@\n /*\n- * (C) Copyright 2016\n- * Alexander Graf \n+ * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH\n+ * (C) Copyright 2016 Alexander Graf \n *\n * SPDX-License-Identifier:\tGPL-2.0+\n */\n@@ -8,89 +8,21 @@\n #ifndef _SETJMP_H_\n #define _SETJMP_H_\t1\n \n+/*\n+ * This really should be opaque, but the EFI implementation wrongly\n+ * assumes that a 'struct jmp_buf_data' is defined.\n+ */\n struct jmp_buf_data {\n-\tulong target;\n-\tulong regs[5];\n-\tint ret;\n-};\n-\n-typedef struct jmp_buf_data jmp_buf[1];\n-\n-static inline int setjmp(jmp_buf jmp)\n-{\n-\tjmp->ret = 0;\n-\n-#ifdef CONFIG_ARM64\n-\tasm volatile(\n-\t\t\"adr x1, jmp_target\\n\"\n-\t\t\"str x1, %0\\n\"\n-\t\t\"stp x26, x27, %1\\n\"\n-\t\t\"stp x28, x29, %2\\n\"\n-\t\t\"mov x1, sp\\n\"\n-\t\t\"str x1, %3\\n\"\n-\t\t\"jmp_target: \"\n-\t\t: \"=m\" (jmp->target), \"=m\" (jmp->regs[0]),\n-\t\t \"=m\" (jmp->regs[2]), \"=m\" (jmp->regs[4])\n-\t\t:\n-\t\t: \"x0\", \"x1\", \"x2\", \"x3\", \"x4\", \"x5\", \"x6\", \"x7\",\n-\t\t \"x8\", \"x9\", \"x10\", \"x11\", \"x12\", \"x13\", \"x14\", \"x15\",\n-\t\t \"x16\", \"x17\", \"x18\", \"x19\", \"x20\", \"x21\", \"x22\",\n-\t\t \"x23\", \"x24\", \"x25\", /* x26, x27, x28, x29, sp */\n-\t\t \"x30\", \"cc\", \"memory\");\n-#else\n-\tasm volatile(\n-#if CONFIG_IS_ENABLED(SYS_THUMB_BUILD)\n-\t\t\".align 2\\n\"\n-\t\t\"adr r0, jmp_target\\n\"\n-\t\t\"add r0, r0, $1\\n\"\n+#if defined(__aarch64__)\n+\tu64 regs[13];\n #else\n-\t\t\"adr r0, jmp_target\\n\"\n-#endif\n-\t\t\"mov r1, %0\\n\"\n-\t\t\"mov r2, sp\\n\"\n-\t\t\"stm r1!, {r0, r2, r4, r5, r6, r7}\\n\"\n-\t\t\".align 2\\n\"\n-\t\t\"jmp_target: \\n\"\n-\t\t:\n-\t\t: \"l\" (&jmp->target)\n-\t\t: \"r0\", \"r1\", \"r2\", \"r3\", /* \"r4\", \"r5\", \"r6\", \"r7\", */\n-\t\t \"r8\", \"r9\", \"r10\", \"r11\", /* sp, */ \"ip\", \"lr\",\n-\t\t \"cc\", \"memory\");\n-#endif\n-\n-\treturn jmp->ret;\n-}\n-\n-static inline __noreturn void longjmp(jmp_buf jmp, int ret)\n-{\n-\tjmp->ret = ret;\n-\n-#ifdef CONFIG_ARM64\n-\tasm volatile(\n-\t\t\"ldr x0, %0\\n\"\n-\t\t\"ldr x1, %3\\n\"\n-\t\t\"mov sp, x1\\n\"\n-\t\t\"ldp x26, x27, %1\\n\"\n-\t\t\"ldp x28, x25, %2\\n\"\n-\t\t\"mov x29, x25\\n\"\n-\t\t\"br x0\\n\"\n-\t\t:\n-\t\t: \"m\" (jmp->target), \"m\" (jmp->regs[0]), \"m\" (jmp->regs[2]),\n-\t\t \"m\" (jmp->regs[4])\n-\t\t: \"x0\", \"x1\", \"x25\", \"x26\", \"x27\", \"x28\");\n-#else\n-\tasm volatile(\n-\t\t\"mov r1, %0\\n\"\n-\t\t\"ldm r1!, {r0, r2, r4, r5, r6, r7}\\n\"\n-\t\t\"mov sp, r2\\n\"\n-\t\t\"bx r0\\n\"\n-\t\t:\n-\t\t: \"l\" (&jmp->target)\n-\t\t: \"r1\");\n+\tu32 regs[10]; /* r4-r9, sl, fp, sp, lr */\n #endif\n+};\n \n-\twhile (1) { }\n-}\n+typedef struct jmp_buf_data jmp_buf[1];\n \n+int setjmp(jmp_buf jmp);\n+void longjmp(jmp_buf jmp, int ret);\n \n #endif /* _SETJMP_H_ */\ndiff --git a/arch/arm/lib/Makefile b/arch/arm/lib/Makefile\nindex 6e1c436..abffa10 100644\n--- a/arch/arm/lib/Makefile\n+++ b/arch/arm/lib/Makefile\n@@ -17,6 +17,12 @@ else\n obj-y\t+= vectors.o crt0.o\n endif\n \n+ifdef CONFIG_ARM64\n+obj-y += setjmp_aarch64.o\n+else\n+obj-y += setjmp.o\n+endif\n+\n ifndef CONFIG_SPL_BUILD\n ifdef CONFIG_ARM64\n obj-y\t+= relocate_64.o\ndiff --git a/arch/arm/lib/setjmp.S b/arch/arm/lib/setjmp.S\nnew file mode 100644\nindex 0000000..6746e5e\n--- /dev/null\n+++ b/arch/arm/lib/setjmp.S\n@@ -0,0 +1,37 @@\n+/*\n+ * (C) 2017 Theobroma Systems Design und Consulting GmbH\n+ *\n+ * SPDX-License-Identifier:\tGPL-2.0+\n+ */\n+\n+#include \n+#include \n+#include \n+\n+.pushsection .text.setjmp, \"ax\"\n+ENTRY(setjmp)\n+\t/*\n+\t * A subroutine must preserve the contents of the registers\n+\t * r4-r8, r10, r11 (v1-v5, v7 and v8) and SP (and r9 in PCS\n+\t * variants that designate r9 as v6).\n+\t */\n+\tmov ip, sp\n+\tstm a1, {v1-v8, ip, lr}\n+\tmov a1, #0\n+\tbx lr\n+ENDPROC(setjmp)\n+.popsection\n+\n+.pushsection .text.longjmp, \"ax\"\n+ENTRY(longjmp)\n+\tldm a1, {v1-v8, ip, lr}\n+\tmov sp, ip\n+\tmov a1, a2\n+\t/* If we were passed a return value of zero, return one instead */\n+\tcmp a1, #0\n+\tbne 1f\n+\tmov a1, #1\n+1:\n+\tbx lr\n+ENDPROC(longjmp)\n+.popsection\ndiff --git a/arch/arm/lib/setjmp_aarch64.S b/arch/arm/lib/setjmp_aarch64.S\nnew file mode 100644\nindex 0000000..b68edb8\n--- /dev/null\n+++ b/arch/arm/lib/setjmp_aarch64.S\n@@ -0,0 +1,42 @@\n+/*\n+ * (C) 2017 Theobroma Systems Design und Consulting GmbH\n+ *\n+ * SPDX-License-Identifier:\tGPL-2.0+\n+ */\n+\n+#include \n+#include \n+#include \n+\n+.pushsection .text.setjmp, \"ax\"\n+ENTRY(setjmp)\n+\t/* Preserve all callee-saved registers and the SP */\n+\tstp x19, x20, [x0,#0]\n+\tstp x21, x22, [x0,#16]\n+\tstp x23, x24, [x0,#32]\n+\tstp x25, x26, [x0,#48]\n+\tstp x27, x28, [x0,#64]\n+\tstp x29, x30, [x0,#80]\n+\tmov x2, sp\n+\tstr x2, [x0, #96]\n+\tmov x0, #0\n+\tret\n+ENDPROC(setjmp)\n+.popsection\n+\n+.pushsection .text.longjmp, \"ax\"\n+ENTRY(longjmp)\n+\tldp x19, x20, [x0,#0]\n+\tldp x21, x22, [x0,#16]\n+\tldp x23, x24, [x0,#32]\n+\tldp x25, x26, [x0,#48]\n+\tldp x27, x28, [x0,#64]\n+\tldp x29, x30, [x0,#80]\n+\tldr x2, [x0,#96]\n+\tmov sp, x2\n+\t/* Move the return value in place, but return 1 if passed 0. */\n+\tadds x0, xzr, x1\n+\tcsinc x0, x0, xzr, ne\n+\tret\n+ENDPROC(longjmp)\n+.popsection\n","prefixes":["U-Boot","v3","3/6"]}