{"id":816631,"url":"http://patchwork.ozlabs.org/api/patches/816631/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20170921012037.553-3-jsnow@redhat.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170921012037.553-3-jsnow@redhat.com>","list_archive_url":null,"date":"2017-09-21T01:20:37","name":"[2/2] ide: generic ide_data_write","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"bb5ace54d3cdc4eb57902c4b4f88fef4388e490b","submitter":{"id":64343,"url":"http://patchwork.ozlabs.org/api/people/64343/?format=json","name":"John Snow","email":"jsnow@redhat.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20170921012037.553-3-jsnow@redhat.com/mbox/","series":[{"id":4269,"url":"http://patchwork.ozlabs.org/api/series/4269/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=4269","date":"2017-09-21T01:20:35","name":"IDE: combine portio r/w functions","version":1,"mbox":"http://patchwork.ozlabs.org/series/4269/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/816631/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/816631/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","ext-mx04.extmail.prod.ext.phx2.redhat.com;\n\tdmarc=none (p=none dis=none) header.from=redhat.com","ext-mx04.extmail.prod.ext.phx2.redhat.com;\n\tspf=fail smtp.mailfrom=jsnow@redhat.com"],"Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xyJjX50b9z9s4q\n\tfor ;\n\tThu, 21 Sep 2017 11:21:36 +1000 (AEST)","from localhost ([::1]:51326 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t)\n\tid 1duqBK-0008Kn-R2\n\tfor incoming@patchwork.ozlabs.org; Wed, 20 Sep 2017 21:21:34 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:40981)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from ) id 1duqAa-0008BW-F1\n\tfor qemu-devel@nongnu.org; Wed, 20 Sep 2017 21:20:49 -0400","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from ) id 1duqAZ-00073h-2q\n\tfor qemu-devel@nongnu.org; Wed, 20 Sep 2017 21:20:48 -0400","from mx1.redhat.com ([209.132.183.28]:43758)\n\tby eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from )\n\tid 1duqAU-0006x0-Gz; Wed, 20 Sep 2017 21:20:42 -0400","from smtp.corp.redhat.com\n\t(int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby mx1.redhat.com (Postfix) with ESMTPS id A560F80461;\n\tThu, 21 Sep 2017 01:20:41 +0000 (UTC)","from probe.bos.redhat.com (dhcp-17-130.bos.redhat.com\n\t[10.18.17.130])\n\tby smtp.corp.redhat.com (Postfix) with ESMTP id 23CFE60BE6;\n\tThu, 21 Sep 2017 01:20:41 +0000 (UTC)"],"DMARC-Filter":"OpenDMARC Filter v1.3.2 mx1.redhat.com A560F80461","From":"John Snow ","To":"qemu-block@nongnu.org","Date":"Wed, 20 Sep 2017 21:20:37 -0400","Message-Id":"<20170921012037.553-3-jsnow@redhat.com>","In-Reply-To":"<20170921012037.553-1-jsnow@redhat.com>","References":"<20170921012037.553-1-jsnow@redhat.com>","X-Scanned-By":"MIMEDefang 2.79 on 10.5.11.12","X-Greylist":"Sender IP whitelisted, not delayed by milter-greylist-4.5.16\n\t(mx1.redhat.com [10.5.110.28]);\n\tThu, 21 Sep 2017 01:20:41 +0000 (UTC)","X-detected-operating-system":"by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic]\n\t[fuzzy]","X-Received-From":"209.132.183.28","Subject":"[Qemu-devel] [PATCH 2/2] ide: generic ide_data_write","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"John Snow , mark.cave-ayland@ilande.co.uk,\n\tqemu-devel@nongnu.org","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"},"content":"Signed-off-by: John Snow \n---\n hw/ide/core.c | 86 +++++++++++++++++++++--------------------------\n hw/ide/trace-events | 3 +-\n include/hw/ide/internal.h | 1 +\n 3 files changed, 40 insertions(+), 50 deletions(-)","diff":"diff --git a/hw/ide/core.c b/hw/ide/core.c\nindex 393f523..af49de5 100644\n--- a/hw/ide/core.c\n+++ b/hw/ide/core.c\n@@ -2266,6 +2266,42 @@ static bool ide_is_pio_out(IDEState *s)\n abort();\n }\n \n+void ide_data_write(void *opaque, uint32_t addr, short nbytes, uint32_t val)\n+{\n+ IDEBus *bus = opaque;\n+ IDEState *s = idebus_active_if(bus);\n+ uint8_t *p;\n+\n+ trace_ide_data_write(addr, nbytes, val, bus, s);\n+\n+ /* PIO data access allowed only when DRQ bit is set. The result of a write\n+ * during PIO out is indeterminate, just ignore it. */\n+ if (!(s->status & DRQ_STAT) || ide_is_pio_out(s)) {\n+ return;\n+ }\n+\n+ if (nbytes != 2 && nbytes != 4) {\n+ return;\n+ }\n+\n+ p = s->data_ptr;\n+ if (p + nbytes > s->data_end) {\n+ return;\n+ }\n+\n+ if (nbytes == 2) {\n+ *(uint16_t *)p = le16_to_cpu(val);\n+ } else if (nbytes == 4) {\n+ *(uint32_t *)p = le32_to_cpu(val);\n+ }\n+ p += nbytes;\n+ s->data_ptr = p;\n+ if (p >= s->data_end) {\n+ s->status &= ~DRQ_STAT;\n+ s->end_transfer_func(s);\n+ }\n+}\n+\n uint32_t ide_data_read(void *opaque, uint32_t addr, short nbytes)\n {\n IDEBus *bus = opaque;\n@@ -2311,30 +2347,7 @@ uint32_t ide_data_read(void *opaque, uint32_t addr, short nbytes)\n \n void ide_data_writew(void *opaque, uint32_t addr, uint32_t val)\n {\n- IDEBus *bus = opaque;\n- IDEState *s = idebus_active_if(bus);\n- uint8_t *p;\n-\n- trace_ide_data_writew(addr, val, bus, s);\n-\n- /* PIO data access allowed only when DRQ bit is set. The result of a write\n- * during PIO out is indeterminate, just ignore it. */\n- if (!(s->status & DRQ_STAT) || ide_is_pio_out(s)) {\n- return;\n- }\n-\n- p = s->data_ptr;\n- if (p + 2 > s->data_end) {\n- return;\n- }\n-\n- *(uint16_t *)p = le16_to_cpu(val);\n- p += 2;\n- s->data_ptr = p;\n- if (p >= s->data_end) {\n- s->status &= ~DRQ_STAT;\n- s->end_transfer_func(s);\n- }\n+ return ide_data_write(opaque, addr, 2, val);\n }\n \n uint32_t ide_data_readw(void *opaque, uint32_t addr)\n@@ -2344,30 +2357,7 @@ uint32_t ide_data_readw(void *opaque, uint32_t addr)\n \n void ide_data_writel(void *opaque, uint32_t addr, uint32_t val)\n {\n- IDEBus *bus = opaque;\n- IDEState *s = idebus_active_if(bus);\n- uint8_t *p;\n-\n- trace_ide_data_writel(addr, val, bus, s);\n-\n- /* PIO data access allowed only when DRQ bit is set. The result of a write\n- * during PIO out is indeterminate, just ignore it. */\n- if (!(s->status & DRQ_STAT) || ide_is_pio_out(s)) {\n- return;\n- }\n-\n- p = s->data_ptr;\n- if (p + 4 > s->data_end) {\n- return;\n- }\n-\n- *(uint32_t *)p = le32_to_cpu(val);\n- p += 4;\n- s->data_ptr = p;\n- if (p >= s->data_end) {\n- s->status &= ~DRQ_STAT;\n- s->end_transfer_func(s);\n- }\n+ return ide_data_write(opaque, addr, 4, val);\n }\n \n uint32_t ide_data_readl(void *opaque, uint32_t addr)\ndiff --git a/hw/ide/trace-events b/hw/ide/trace-events\nindex e42c428..e92c0bb 100644\n--- a/hw/ide/trace-events\n+++ b/hw/ide/trace-events\n@@ -7,9 +7,8 @@ ide_ioport_write(uint32_t addr, const char *reg, uint32_t val, void *bus, void *\n ide_status_read(uint32_t addr, uint32_t val, void *bus, void *s) \"IDE PIO rd @ 0x%\"PRIx32\" (Alt Status); val 0x%02\"PRIx32\"; bus %p; IDEState %p\"\n ide_cmd_write(uint32_t addr, uint32_t val, void *bus) \"IDE PIO wr @ 0x%\"PRIx32\" (Device Control); val 0x%02\"PRIx32\"; bus %p\"\n # Warning: verbose\n-ide_data_writew(uint32_t addr, uint32_t val, void *bus, void *s) \"IDE PIO wr @ 0x%\"PRIx32\" (Data: Word); val 0x%04\"PRIx32\"; bus %p; IDEState %p\"\n-ide_data_writel(uint32_t addr, uint32_t val, void *bus, void *s) \"IDE PIO wr @ 0x%\"PRIx32\" (Data: Long); val 0x%08\"PRIx32\"; bus %p; IDEState %p\"\n ide_data_read(uint32_t addr, short nbytes, uint32_t val, void *bus, void *s) \"IDE PIO rd @ 0x%\"PRIx32\" (Data: %d bytes); val 0x%08\"PRIx32\"; bus %p; IDEState %p\"\n+ide_data_write(uint32_t addr, short nbytes, uint32_t val, void *bus, void *s) \"IDE PIO wr @ 0x%\"PRIx32\" (Data: %d bytes); val 0x%08\"PRIx32\"; bus %p; IDEState %p\"\n \n # misc\n ide_exec_cmd(void *bus, void *state, uint32_t cmd) \"IDE exec cmd: bus %p; state %p; cmd 0x%02x\"\ndiff --git a/include/hw/ide/internal.h b/include/hw/ide/internal.h\nindex 3159c66..deb592d 100644\n--- a/include/hw/ide/internal.h\n+++ b/include/hw/ide/internal.h\n@@ -598,6 +598,7 @@ void ide_ioport_write(void *opaque, uint32_t addr, uint32_t val);\n uint32_t ide_ioport_read(void *opaque, uint32_t addr1);\n uint32_t ide_status_read(void *opaque, uint32_t addr);\n void ide_cmd_write(void *opaque, uint32_t addr, uint32_t val);\n+void ide_data_write(void *opaque, uint32_t addr, short nbytes, uint32_t val);\n void ide_data_writew(void *opaque, uint32_t addr, uint32_t val);\n void ide_data_writel(void *opaque, uint32_t addr, uint32_t val);\n uint32_t ide_data_read(void *opaque, uint32_t addr, short nbytes);\n","prefixes":["2/2"]}