{"id":816459,"url":"http://patchwork.ozlabs.org/api/patches/816459/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20170920201737.25723-6-f4bug@amsat.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170920201737.25723-6-f4bug@amsat.org>","list_archive_url":null,"date":"2017-09-20T20:17:37","name":"[v11,5/5] msf2: Add Emcraft's Smartfusion2 SOM kit","commit_ref":null,"pull_url":null,"state":"accepted","archived":true,"hash":"ef4fd7727a7dd37af31e24de6c96ddcb8f585540","submitter":{"id":70924,"url":"http://patchwork.ozlabs.org/api/people/70924/?format=json","name":"Philippe Mathieu-Daudé","email":"f4bug@amsat.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20170920201737.25723-6-f4bug@amsat.org/mbox/","series":[{"id":4222,"url":"http://patchwork.ozlabs.org/api/series/4222/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=4222","date":"2017-09-20T20:17:32","name":"Add support for Smartfusion2 SoC","version":11,"mbox":"http://patchwork.ozlabs.org/series/4222/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/816459/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/816459/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; 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charset=UTF-8","Content-Transfer-Encoding":"8bit","X-detected-operating-system":"by eggs.gnu.org: Genre and OS details not\n\trecognized.","X-Received-From":"2607:f8b0:400d:c09::22d","Subject":"[Qemu-devel] [PATCH v11 5/5] msf2: Add Emcraft's Smartfusion2 SOM\n\tkit","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"=?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"},"content":"From: Subbaraya Sundeep \n\nEmulated Emcraft's Smartfusion2 System On Module starter\nkit.\n\nSigned-off-by: Subbaraya Sundeep \nSigned-off-by: Philippe Mathieu-Daudé \n[PMD: drop cpu_model to directly use cpu type]\n---\n hw/arm/msf2-som.c | 105 +++++++++++++++++++++++++++++++++++++++++++++++++++\n hw/arm/Makefile.objs | 2 +-\n 2 files changed, 106 insertions(+), 1 deletion(-)\n create mode 100644 hw/arm/msf2-som.c","diff":"diff --git a/hw/arm/msf2-som.c b/hw/arm/msf2-som.c\nnew file mode 100644\nindex 0000000000..0795a3a3a1\n--- /dev/null\n+++ b/hw/arm/msf2-som.c\n@@ -0,0 +1,105 @@\n+/*\n+ * SmartFusion2 SOM starter kit(from Emcraft) emulation.\n+ *\n+ * Copyright (c) 2017 Subbaraya Sundeep \n+ *\n+ * Permission is hereby granted, free of charge, to any person obtaining a copy\n+ * of this software and associated documentation files (the \"Software\"), to deal\n+ * in the Software without restriction, including without limitation the rights\n+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell\n+ * copies of the Software, and to permit persons to whom the Software is\n+ * furnished to do so, subject to the following conditions:\n+ *\n+ * The above copyright notice and this permission notice shall be included in\n+ * all copies or substantial portions of the Software.\n+ *\n+ * THE SOFTWARE IS PROVIDED \"AS IS\", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR\n+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,\n+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL\n+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER\n+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,\n+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN\n+ * THE SOFTWARE.\n+ */\n+\n+#include \"qemu/osdep.h\"\n+#include \"qapi/error.h\"\n+#include \"qemu/error-report.h\"\n+#include \"hw/boards.h\"\n+#include \"hw/arm/arm.h\"\n+#include \"exec/address-spaces.h\"\n+#include \"qemu/cutils.h\"\n+#include \"hw/arm/msf2-soc.h\"\n+#include \"cpu.h\"\n+\n+#define DDR_BASE_ADDRESS 0xA0000000\n+#define DDR_SIZE (64 * M_BYTE)\n+\n+#define M2S010_ENVM_SIZE (256 * K_BYTE)\n+#define M2S010_ESRAM_SIZE (64 * K_BYTE)\n+\n+static void emcraft_sf2_s2s010_init(MachineState *machine)\n+{\n+ DeviceState *dev;\n+ DeviceState *spi_flash;\n+ MSF2State *soc;\n+ MachineClass *mc = MACHINE_GET_CLASS(machine);\n+ DriveInfo *dinfo = drive_get_next(IF_MTD);\n+ qemu_irq cs_line;\n+ SSIBus *spi_bus;\n+ MemoryRegion *sysmem = get_system_memory();\n+ MemoryRegion *ddr = g_new(MemoryRegion, 1);\n+\n+ if (strcmp(machine->cpu_type, mc->default_cpu_type) != 0) {\n+ error_report(\"This board can only be used with CPU %s\",\n+ mc->default_cpu_type);\n+ }\n+\n+ memory_region_init_ram(ddr, NULL, \"ddr-ram\", DDR_SIZE,\n+ &error_fatal);\n+ memory_region_add_subregion(sysmem, DDR_BASE_ADDRESS, ddr);\n+\n+ dev = qdev_create(NULL, TYPE_MSF2_SOC);\n+ qdev_prop_set_string(dev, \"part-name\", \"M2S010\");\n+ qdev_prop_set_string(dev, \"cpu-type\", mc->default_cpu_type);\n+\n+ qdev_prop_set_uint64(dev, \"eNVM-size\", M2S010_ENVM_SIZE);\n+ qdev_prop_set_uint64(dev, \"eSRAM-size\", M2S010_ESRAM_SIZE);\n+\n+ /*\n+ * CPU clock and peripheral clocks(APB0, APB1)are configurable\n+ * in Libero. CPU clock is divided by APB0 and APB1 divisors for\n+ * peripherals. Emcraft's SoM kit comes with these settings by default.\n+ */\n+ qdev_prop_set_uint32(dev, \"m3clk\", 142 * 1000000);\n+ qdev_prop_set_uint32(dev, \"apb0div\", 2);\n+ qdev_prop_set_uint32(dev, \"apb1div\", 2);\n+\n+ object_property_set_bool(OBJECT(dev), true, \"realized\", &error_fatal);\n+\n+ soc = MSF2_SOC(dev);\n+\n+ /* Attach SPI flash to SPI0 controller */\n+ spi_bus = (SSIBus *)qdev_get_child_bus(dev, \"spi0\");\n+ spi_flash = ssi_create_slave_no_init(spi_bus, \"s25sl12801\");\n+ qdev_prop_set_uint8(spi_flash, \"spansion-cr2nv\", 1);\n+ if (dinfo) {\n+ qdev_prop_set_drive(spi_flash, \"drive\", blk_by_legacy_dinfo(dinfo),\n+ &error_fatal);\n+ }\n+ qdev_init_nofail(spi_flash);\n+ cs_line = qdev_get_gpio_in_named(spi_flash, SSI_GPIO_CS, 0);\n+ sysbus_connect_irq(SYS_BUS_DEVICE(&soc->spi[0]), 1, cs_line);\n+\n+ armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename,\n+ soc->envm_size);\n+}\n+\n+static void emcraft_sf2_machine_init(MachineClass *mc)\n+{\n+ mc->desc = \"SmartFusion2 SOM kit from Emcraft (M2S010)\";\n+ mc->init = emcraft_sf2_s2s010_init;\n+ mc->default_cpu_type = ARM_CPU_TYPE_NAME(\"cortex-m3\");\n+}\n+\n+DEFINE_MACHINE(\"emcraft-sf2\", emcraft_sf2_machine_init)\ndiff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs\nindex a6cf24f6ac..2794e086d6 100644\n--- a/hw/arm/Makefile.objs\n+++ b/hw/arm/Makefile.objs\n@@ -19,4 +19,4 @@ obj-$(CONFIG_FSL_IMX31) += fsl-imx31.o kzm.o\n obj-$(CONFIG_FSL_IMX6) += fsl-imx6.o sabrelite.o\n obj-$(CONFIG_ASPEED_SOC) += aspeed_soc.o aspeed.o\n obj-$(CONFIG_MPS2) += mps2.o\n-obj-$(CONFIG_MSF2) += msf2-soc.o\n+obj-$(CONFIG_MSF2) += msf2-soc.o msf2-som.o\n","prefixes":["v11","5/5"]}