{"id":816396,"url":"http://patchwork.ozlabs.org/api/patches/816396/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-mtd/patch/1505932139-2905-4-git-send-email-matthew.gerlach@linux.intel.com/","project":{"id":3,"url":"http://patchwork.ozlabs.org/api/projects/3/?format=json","name":"Linux MTD development","link_name":"linux-mtd","list_id":"linux-mtd.lists.infradead.org","list_email":"linux-mtd@lists.infradead.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1505932139-2905-4-git-send-email-matthew.gerlach@linux.intel.com>","list_archive_url":null,"date":"2017-09-20T18:28:59","name":"[v2,3/3] mtd: spi-nor: add flag for reading dummy cycles from nv cfg reg","commit_ref":null,"pull_url":null,"state":"rejected","archived":false,"hash":"e6d0bf511163d4e85cafd31514dc08bec6ba97c8","submitter":{"id":70992,"url":"http://patchwork.ozlabs.org/api/people/70992/?format=json","name":"Matthew Gerlach","email":"matthew.gerlach@linux.intel.com"},"delegate":{"id":63396,"url":"http://patchwork.ozlabs.org/api/users/63396/?format=json","username":"cpitchen","first_name":"Cyrille","last_name":"Pitchen","email":"cyrille.pitchen@atmel.com"},"mbox":"http://patchwork.ozlabs.org/project/linux-mtd/patch/1505932139-2905-4-git-send-email-matthew.gerlach@linux.intel.com/mbox/","series":[{"id":4190,"url":"http://patchwork.ozlabs.org/api/series/4190/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-mtd/list/?series=4190","date":"2017-09-20T18:28:57","name":"Altera ASMI Parallel II IP Core","version":2,"mbox":"http://patchwork.ozlabs.org/series/4190/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/816396/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/816396/checks/","tags":{},"related":[],"headers":{"Return-Path":"<linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org; 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d=\"scan'208\";a=\"137603185\"","From":"matthew.gerlach@linux.intel.com","To":"vndao@altera.com, dwmw2@infradead.org, computersforpeace@gmail.com,\n\tboris.brezillon@free-electrons.com, marek.vasut@gmail.com,\n\trichard@nod.at, \n\tcyrille.pitchen@wedev4u.fr, robh+dt@kernel.org, mark.rutland@arm.com, \n\tlinux-mtd@lists.infradead.org, devicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org, gregkh@linuxfoundation.org,\n\tdavem@davemloft.net, mchehab@kernel.org, linux-fpga@vger.kernel.org, \n\ttien.hock.loh@intel.com, hean.loong.ong@intel.com","Subject":"[PATCH v2 3/3] mtd: spi-nor: add flag for reading dummy cycles from\n\tnv cfg reg","Date":"Wed, 20 Sep 2017 11:28:59 -0700","Message-Id":"<1505932139-2905-4-git-send-email-matthew.gerlach@linux.intel.com>","X-Mailer":"git-send-email 2.7.4","In-Reply-To":"<1505932139-2905-1-git-send-email-matthew.gerlach@linux.intel.com>","References":"<1505932139-2905-1-git-send-email-matthew.gerlach@linux.intel.com>","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170920_112952_633196_4344F4ED ","X-CRM114-Status":"GOOD (  15.41  )","X-Spam-Score":"-6.9 (------)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details:   (-6.9 points)\n\tpts rule name              description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-5.0 RCVD_IN_DNSWL_HI RBL: Sender listed at http://www.dnswl.org/,\n\thigh trust [134.134.136.24 listed in list.dnswl.org]\n\t-0.0 RCVD_IN_MSPIKE_H3      RBL: Good reputation (+3)\n\t[134.134.136.24 listed in wl.mailspike.net]\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00               BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t-0.0 RCVD_IN_MSPIKE_WL      Mailspike good senders","X-BeenThere":"linux-mtd@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"Linux MTD discussion mailing list <linux-mtd.lists.infradead.org>","List-Unsubscribe":"<http://lists.infradead.org/mailman/options/linux-mtd>,\n\t<mailto:linux-mtd-request@lists.infradead.org?subject=unsubscribe>","List-Archive":"<http://lists.infradead.org/pipermail/linux-mtd/>","List-Post":"<mailto:linux-mtd@lists.infradead.org>","List-Help":"<mailto:linux-mtd-request@lists.infradead.org?subject=help>","List-Subscribe":"<http://lists.infradead.org/mailman/listinfo/linux-mtd>,\n\t<mailto:linux-mtd-request@lists.infradead.org?subject=subscribe>","Cc":"Matthew Gerlach <matthew.gerlach@linux.intel.com>","MIME-Version":"1.0","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-mtd\" <linux-mtd-bounces@lists.infradead.org>","Errors-To":"linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org"},"content":"From: Matthew Gerlach <matthew.gerlach@linux.intel.com>\n\nThis patch is a work around for some non-standard behavior\nof EPCQ flash parts:\n\nhttps://www.altera.com/documentation/wtw1396921531042.html#wtw1396921651224\n\nThese flash parts are generally used to configure Intel/Altera FPGAs\non power up.  These parts report a JEDEC id of the Micron part at the core,\nbut have a different number of dummy cycles than specified in the Micron\ndata sheet.  The number of required dummy cycles can be read from the\nNon-Volatile Configuration register.\n\nSigned-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>\n---\n drivers/mtd/spi-nor/altera-asmip2.c | 31 ++++++++++++++++++++++++++-----\n include/linux/mtd/altera-asmip2.h   |  3 +++\n 2 files changed, 29 insertions(+), 5 deletions(-)","diff":"diff --git a/drivers/mtd/spi-nor/altera-asmip2.c b/drivers/mtd/spi-nor/altera-asmip2.c\nindex a977765..d9cd807 100644\n--- a/drivers/mtd/spi-nor/altera-asmip2.c\n+++ b/drivers/mtd/spi-nor/altera-asmip2.c\n@@ -40,6 +40,10 @@\n #define QSPI_POLL_TIMEOUT_US\t\t10000000\n #define QSPI_POLL_INTERVAL_US\t\t5\n \n+#define SPINOR_OP_RD_NVCFG\t\t0xb5\n+#define NVCFG_DUMMY_SFT\t\t\t12\n+#define NVCFG_DUMMY_MASK\t\t0xf\n+\n struct altera_asmip2 {\n \tvoid __iomem *csr_base;\n \tu32 num_flashes;\n@@ -231,7 +235,8 @@ static void altera_asmip2_unprep(struct spi_nor *nor, enum spi_nor_ops ops)\n }\n \n static int altera_asmip2_setup_banks(struct device *dev,\n-\t\t\t\t      u32 bank, struct device_node *np)\n+\t\t\t\t     u32 bank, struct device_node *np,\n+\t\t\t\t     u32 flags)\n {\n \tconst struct spi_nor_hwcaps hwcaps = {\n \t\t.mask = SNOR_HWCAPS_READ |\n@@ -241,6 +246,7 @@ static int altera_asmip2_setup_banks(struct device *dev,\n \tstruct altera_asmip2 *q = dev_get_drvdata(dev);\n \tstruct altera_asmip2_flash *flash;\n \tstruct spi_nor *nor;\n+\tu16 nvcfg;\n \tint ret = 0;\n \n \tif (bank > q->num_flashes - 1)\n@@ -273,6 +279,20 @@ static int altera_asmip2_setup_banks(struct device *dev,\n \t\treturn ret;\n \t}\n \n+\tif (flags & ALTERA_ASMIP2_FLASH_FLG_RD_NVCFG) {\n+\t\tret = altera_asmip2_read_reg(nor, SPINOR_OP_RD_NVCFG,\n+\t\t \t\t\t     (u8*)&nvcfg, sizeof(nvcfg));\n+\n+\t\tif (ret) {\n+\t\t\tdev_err(nor->dev,\n+\t\t\t\t\"failed to read NV Configuration register\\n\");\n+\t\t\treturn ret;\n+\t\t}\n+\n+\t\tnor->read_dummy = (nvcfg >> NVCFG_DUMMY_SFT) & NVCFG_DUMMY_MASK;\n+\t\tdev_info(nor->dev, \"%s dummy %d\\n\", __func__, nor->read_dummy);\n+\t}\n+\n \tret =  mtd_device_register(&nor->mtd, NULL, 0);\n \n \treturn ret;\n@@ -308,7 +328,7 @@ static int altera_asmip2_create(struct device *dev, void __iomem *csr_base)\n }\n \n static int altera_asmip2_add_bank(struct device *dev,\n-\t\t\t u32 bank, struct device_node *np)\n+\t\t\t u32 bank, struct device_node *np, u32 flags)\n {\n \tstruct altera_asmip2 *q = dev_get_drvdata(dev);\n \n@@ -317,7 +337,7 @@ static int altera_asmip2_add_bank(struct device *dev,\n \n \tq->num_flashes++;\n \n-\treturn altera_asmip2_setup_banks(dev, bank, np);\n+\treturn altera_asmip2_setup_banks(dev, bank, np, flags);\n }\n \n static int altera_asmip2_remove_banks(struct device *dev)\n@@ -361,7 +381,8 @@ static int altera_asmip2_probe_with_pdata(struct platform_device *pdev,\n \t}\n \n \tfor (i = 0; i < qdata->num_chip_sel; i++) {\n-\t\tret = altera_asmip2_add_bank(dev, i, NULL);\n+\t\tret = altera_asmip2_add_bank(dev, i, NULL,\n+\t\t\t\t\t     qdata->flash_flags[i]);\n \t\tif (ret) {\n \t\t\tdev_err(dev, \"failed to add qspi bank %d\\n\", ret);\n \t\t\tbreak;\n@@ -414,7 +435,7 @@ static int altera_asmip2_probe(struct platform_device *pdev)\n \t\t\tgoto error;\n \t\t}\n \n-\t\tif (altera_asmip2_add_bank(dev, bank, pp)) {\n+\t\tif (altera_asmip2_add_bank(dev, bank, pp, 0)) {\n \t\t\tdev_err(dev, \"failed to add bank %u\\n\", bank);\n \t\t\tgoto error;\n \t\t}\ndiff --git a/include/linux/mtd/altera-asmip2.h b/include/linux/mtd/altera-asmip2.h\nindex 580c43c..185a9b2 100644\n--- a/include/linux/mtd/altera-asmip2.h\n+++ b/include/linux/mtd/altera-asmip2.h\n@@ -16,9 +16,12 @@\n #define ALTERA_ASMIP2_MAX_NUM_FLASH_CHIP 3\n #define ALTERA_ASMIP2_RESOURCE_SIZE 0x10\n \n+#define ALTERA_ASMIP2_FLASH_FLG_RD_NVCFG\tBIT(0)\n+\n struct altera_asmip2_plat_data {\n \tvoid __iomem *csr_base;\n \tu32 num_chip_sel;\n+\tu32 flash_flags[ALTERA_ASMIP2_MAX_NUM_FLASH_CHIP];\n };\n \n #endif\n","prefixes":["v2","3/3"]}