{"id":816228,"url":"http://patchwork.ozlabs.org/api/patches/816228/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-gpio/patch/20170920133927.17390-2-jbrunet@baylibre.com/","project":{"id":42,"url":"http://patchwork.ozlabs.org/api/projects/42/?format=json","name":"Linux GPIO development","link_name":"linux-gpio","list_id":"linux-gpio.vger.kernel.org","list_email":"linux-gpio@vger.kernel.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170920133927.17390-2-jbrunet@baylibre.com>","list_archive_url":null,"date":"2017-09-20T13:39:20","name":"[1/8] pinctrl: meson: remove offset from pinctrl","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"71350c5809540110958d4247ca3b10c3b701ffce","submitter":{"id":69839,"url":"http://patchwork.ozlabs.org/api/people/69839/?format=json","name":"Jerome Brunet","email":"jbrunet@baylibre.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-gpio/patch/20170920133927.17390-2-jbrunet@baylibre.com/mbox/","series":[{"id":4115,"url":"http://patchwork.ozlabs.org/api/series/4115/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-gpio/list/?series=4115","date":"2017-09-20T13:39:19","name":"pinctrl: meson: clean pin offsets","version":1,"mbox":"http://patchwork.ozlabs.org/series/4115/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/816228/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/816228/checks/","tags":{},"related":[],"headers":{"Return-Path":"<linux-gpio-owner@vger.kernel.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; 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\n\tWed, 20 Sep 2017 06:39:36 -0700 (PDT)","From":"Jerome Brunet <jbrunet@baylibre.com>","To":"Linus Walleij <linus.walleij@linaro.org>,\n\tKevin Hilman <khilman@baylibre.com>, Carlo Caione <carlo@caione.org>","Cc":"Jerome Brunet <jbrunet@baylibre.com>, linux-gpio@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tlinux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org,\n\tdevicetree@vger.kernel.org,\n\tMartin Blumenstingl <martin.blumenstingl@googlemail.com>","Subject":"[PATCH 1/8] pinctrl: meson: remove offset from pinctrl","Date":"Wed, 20 Sep 2017 15:39:20 +0200","Message-Id":"<20170920133927.17390-2-jbrunet@baylibre.com>","X-Mailer":"git-send-email 2.13.5","In-Reply-To":"<20170920133927.17390-1-jbrunet@baylibre.com>","References":"<20170920133927.17390-1-jbrunet@baylibre.com>","Sender":"linux-gpio-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<linux-gpio.vger.kernel.org>","X-Mailing-List":"linux-gpio@vger.kernel.org"},"content":"Offset on meson pinctrl and gpios is something that was carried from the\nvendor driver, where there is a weird link between the 2\ncontrollers. Since these 2 controllers are independent, this offset adds\nan unnecessary complexity.\n\nThis patch remove this manually set offset and rely on pinctrl to figure\nout the gpio base offset\n\nTested-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>\nSigned-off-by: Jerome Brunet <jbrunet@baylibre.com>\n---\n drivers/pinctrl/meson/pinctrl-meson.c | 18 +++---------------\n drivers/pinctrl/meson/pinctrl-meson.h |  8 +++-----\n 2 files changed, 6 insertions(+), 20 deletions(-)","diff":"diff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c\nindex 66ed70c12733..247208150b19 100644\n--- a/drivers/pinctrl/meson/pinctrl-meson.c\n+++ b/drivers/pinctrl/meson/pinctrl-meson.c\n@@ -410,18 +410,6 @@ static const struct pinconf_ops meson_pinconf_ops = {\n \t.is_generic\t\t= true,\n };\n \n-static int meson_gpio_request(struct gpio_chip *chip, unsigned gpio)\n-{\n-\treturn pinctrl_request_gpio(chip->base + gpio);\n-}\n-\n-static void meson_gpio_free(struct gpio_chip *chip, unsigned gpio)\n-{\n-\tstruct meson_pinctrl *pc = gpiochip_get_data(chip);\n-\n-\tpinctrl_free_gpio(pc->data->pin_base + gpio);\n-}\n-\n static int meson_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)\n {\n \tstruct meson_pinctrl *pc = gpiochip_get_data(chip);\n@@ -539,13 +527,13 @@ static int meson_gpiolib_register(struct meson_pinctrl *pc)\n \n \tpc->chip.label = pc->data->name;\n \tpc->chip.parent = pc->dev;\n-\tpc->chip.request = meson_gpio_request;\n-\tpc->chip.free = meson_gpio_free;\n+\tpc->chip.request = gpiochip_generic_request;\n+\tpc->chip.free = gpiochip_generic_free;\n \tpc->chip.direction_input = meson_gpio_direction_input;\n \tpc->chip.direction_output = meson_gpio_direction_output;\n \tpc->chip.get = meson_gpio_get;\n \tpc->chip.set = meson_gpio_set;\n-\tpc->chip.base = pc->data->pin_base;\n+\tpc->chip.base = -1;\n \tpc->chip.ngpio = pc->data->num_pins;\n \tpc->chip.can_sleep = false;\n \tpc->chip.of_node = pc->of_node;\ndiff --git a/drivers/pinctrl/meson/pinctrl-meson.h b/drivers/pinctrl/meson/pinctrl-meson.h\nindex 890f296f5840..227b72a60c22 100644\n--- a/drivers/pinctrl/meson/pinctrl-meson.h\n+++ b/drivers/pinctrl/meson/pinctrl-meson.h\n@@ -124,8 +124,6 @@ struct meson_pinctrl {\n \tstruct device_node *of_node;\n };\n \n-#define PIN(x, b)\t(b + x)\n-\n #define GROUP(grp, r, b)\t\t\t\t\t\t\\\n \t{\t\t\t\t\t\t\t\t\\\n \t\t.name = #grp,\t\t\t\t\t\t\\\n@@ -135,10 +133,10 @@ struct meson_pinctrl {\n \t\t.bit = b,\t\t\t\t\t\t\\\n \t }\n \n-#define GPIO_GROUP(gpio, b)\t\t\t\t\t\t\\\n+#define GPIO_GROUP(gpio)\t\t\t\t\t\t\\\n \t{\t\t\t\t\t\t\t\t\\\n \t\t.name = #gpio,\t\t\t\t\t\t\\\n-\t\t.pins = (const unsigned int[]){ PIN(gpio, b) },\t\t\\\n+\t\t.pins = (const unsigned int[]){ gpio },\t\t\t\\\n \t\t.num_pins = 1,\t\t\t\t\t\t\\\n \t\t.is_gpio = true,\t\t\t\t\t\\\n \t }\n@@ -166,7 +164,7 @@ struct meson_pinctrl {\n \t\t},\t\t\t\t\t\t\t\\\n \t }\n \n-#define MESON_PIN(x, b) PINCTRL_PIN(PIN(x, b), #x)\n+#define MESON_PIN(x) PINCTRL_PIN(x, #x)\n \n extern struct meson_pinctrl_data meson8_cbus_pinctrl_data;\n extern struct meson_pinctrl_data meson8_aobus_pinctrl_data;\n","prefixes":["1/8"]}