{"id":816224,"url":"http://patchwork.ozlabs.org/api/patches/816224/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-gpio/patch/20170920133927.17390-7-jbrunet@baylibre.com/","project":{"id":42,"url":"http://patchwork.ozlabs.org/api/projects/42/?format=json","name":"Linux GPIO development","link_name":"linux-gpio","list_id":"linux-gpio.vger.kernel.org","list_email":"linux-gpio@vger.kernel.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170920133927.17390-7-jbrunet@baylibre.com>","list_archive_url":null,"date":"2017-09-20T13:39:25","name":"[6/8] pinctrl: meson: get rid of pin_base","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"246d8b440bafafdf072ccada76e458337a0d60a7","submitter":{"id":69839,"url":"http://patchwork.ozlabs.org/api/people/69839/?format=json","name":"Jerome Brunet","email":"jbrunet@baylibre.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-gpio/patch/20170920133927.17390-7-jbrunet@baylibre.com/mbox/","series":[{"id":4115,"url":"http://patchwork.ozlabs.org/api/series/4115/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-gpio/list/?series=4115","date":"2017-09-20T13:39:19","name":"pinctrl: meson: clean pin offsets","version":1,"mbox":"http://patchwork.ozlabs.org/series/4115/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/816224/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/816224/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; 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\n\tWed, 20 Sep 2017 06:39:43 -0700 (PDT)","From":"Jerome Brunet ","To":"Linus Walleij ,\n\tKevin Hilman , Carlo Caione ","Cc":"Jerome Brunet , linux-gpio@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tlinux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org,\n\tdevicetree@vger.kernel.org,\n\tMartin Blumenstingl ","Subject":"[PATCH 6/8] pinctrl: meson: get rid of pin_base","Date":"Wed, 20 Sep 2017 15:39:25 +0200","Message-Id":"<20170920133927.17390-7-jbrunet@baylibre.com>","X-Mailer":"git-send-email 2.13.5","In-Reply-To":"<20170920133927.17390-1-jbrunet@baylibre.com>","References":"<20170920133927.17390-1-jbrunet@baylibre.com>","Sender":"linux-gpio-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"linux-gpio@vger.kernel.org"},"content":"pin_base was used with the manually set pin offset in meson pinctrl. This\nis no longer the case, pin_base is 0 on every meson pinctrl controllers\nand should go away.\n\nTested-by: Martin Blumenstingl \nSigned-off-by: Jerome Brunet \n---\n drivers/pinctrl/meson/pinctrl-meson-gxbb.c | 2 --\n drivers/pinctrl/meson/pinctrl-meson-gxl.c | 2 --\n drivers/pinctrl/meson/pinctrl-meson.c | 30 +++++++++++++-----------------\n drivers/pinctrl/meson/pinctrl-meson8.c | 2 --\n drivers/pinctrl/meson/pinctrl-meson8b.c | 2 --\n 5 files changed, 13 insertions(+), 25 deletions(-)","diff":"diff --git a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c\nindex 6d52842d3ee5..8e0d6e4a31b4 100644\n--- a/drivers/pinctrl/meson/pinctrl-meson-gxbb.c\n+++ b/drivers/pinctrl/meson/pinctrl-meson-gxbb.c\n@@ -820,7 +820,6 @@ static struct meson_bank meson_gxbb_aobus_banks[] = {\n \n struct meson_pinctrl_data meson_gxbb_periphs_pinctrl_data = {\n \t.name\t\t= \"periphs-banks\",\n-\t.pin_base\t= 0,\n \t.pins\t\t= meson_gxbb_periphs_pins,\n \t.groups\t\t= meson_gxbb_periphs_groups,\n \t.funcs\t\t= meson_gxbb_periphs_functions,\n@@ -833,7 +832,6 @@ struct meson_pinctrl_data meson_gxbb_periphs_pinctrl_data = {\n \n struct meson_pinctrl_data meson_gxbb_aobus_pinctrl_data = {\n \t.name\t\t= \"aobus-banks\",\n-\t.pin_base\t= 0,\n \t.pins\t\t= meson_gxbb_aobus_pins,\n \t.groups\t\t= meson_gxbb_aobus_groups,\n \t.funcs\t\t= meson_gxbb_aobus_functions,\ndiff --git a/drivers/pinctrl/meson/pinctrl-meson-gxl.c b/drivers/pinctrl/meson/pinctrl-meson-gxl.c\nindex 32e35ba9c04e..0d90ddab6ddd 100644\n--- a/drivers/pinctrl/meson/pinctrl-meson-gxl.c\n+++ b/drivers/pinctrl/meson/pinctrl-meson-gxl.c\n@@ -807,7 +807,6 @@ static struct meson_bank meson_gxl_aobus_banks[] = {\n \n struct meson_pinctrl_data meson_gxl_periphs_pinctrl_data = {\n \t.name\t\t= \"periphs-banks\",\n-\t.pin_base\t= 0,\n \t.pins\t\t= meson_gxl_periphs_pins,\n \t.groups\t\t= meson_gxl_periphs_groups,\n \t.funcs\t\t= meson_gxl_periphs_functions,\n@@ -820,7 +819,6 @@ struct meson_pinctrl_data meson_gxl_periphs_pinctrl_data = {\n \n struct meson_pinctrl_data meson_gxl_aobus_pinctrl_data = {\n \t.name\t\t= \"aobus-banks\",\n-\t.pin_base\t= 0,\n \t.pins\t\t= meson_gxl_aobus_pins,\n \t.groups\t\t= meson_gxl_aobus_groups,\n \t.funcs\t\t= meson_gxl_aobus_functions,\ndiff --git a/drivers/pinctrl/meson/pinctrl-meson.c b/drivers/pinctrl/meson/pinctrl-meson.c\nindex 247208150b19..c9cd54de0449 100644\n--- a/drivers/pinctrl/meson/pinctrl-meson.c\n+++ b/drivers/pinctrl/meson/pinctrl-meson.c\n@@ -413,16 +413,15 @@ static const struct pinconf_ops meson_pinconf_ops = {\n static int meson_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)\n {\n \tstruct meson_pinctrl *pc = gpiochip_get_data(chip);\n-\tunsigned int reg, bit, pin;\n+\tunsigned int reg, bit;\n \tstruct meson_bank *bank;\n \tint ret;\n \n-\tpin = pc->data->pin_base + gpio;\n-\tret = meson_get_bank(pc, pin, &bank);\n+\tret = meson_get_bank(pc, gpio, &bank);\n \tif (ret)\n \t\treturn ret;\n \n-\tmeson_calc_reg_and_bit(bank, pin, REG_DIR, ®, &bit);\n+\tmeson_calc_reg_and_bit(bank, gpio, REG_DIR, ®, &bit);\n \n \treturn regmap_update_bits(pc->reg_gpio, reg, BIT(bit), BIT(bit));\n }\n@@ -431,21 +430,20 @@ static int meson_gpio_direction_output(struct gpio_chip *chip, unsigned gpio,\n \t\t\t\t int value)\n {\n \tstruct meson_pinctrl *pc = gpiochip_get_data(chip);\n-\tunsigned int reg, bit, pin;\n+\tunsigned int reg, bit;\n \tstruct meson_bank *bank;\n \tint ret;\n \n-\tpin = pc->data->pin_base + gpio;\n-\tret = meson_get_bank(pc, pin, &bank);\n+\tret = meson_get_bank(pc, gpio, &bank);\n \tif (ret)\n \t\treturn ret;\n \n-\tmeson_calc_reg_and_bit(bank, pin, REG_DIR, ®, &bit);\n+\tmeson_calc_reg_and_bit(bank, gpio, REG_DIR, ®, &bit);\n \tret = regmap_update_bits(pc->reg_gpio, reg, BIT(bit), 0);\n \tif (ret)\n \t\treturn ret;\n \n-\tmeson_calc_reg_and_bit(bank, pin, REG_OUT, ®, &bit);\n+\tmeson_calc_reg_and_bit(bank, gpio, REG_OUT, ®, &bit);\n \treturn regmap_update_bits(pc->reg_gpio, reg, BIT(bit),\n \t\t\t\t value ? BIT(bit) : 0);\n }\n@@ -453,16 +451,15 @@ static int meson_gpio_direction_output(struct gpio_chip *chip, unsigned gpio,\n static void meson_gpio_set(struct gpio_chip *chip, unsigned gpio, int value)\n {\n \tstruct meson_pinctrl *pc = gpiochip_get_data(chip);\n-\tunsigned int reg, bit, pin;\n+\tunsigned int reg, bit;\n \tstruct meson_bank *bank;\n \tint ret;\n \n-\tpin = pc->data->pin_base + gpio;\n-\tret = meson_get_bank(pc, pin, &bank);\n+\tret = meson_get_bank(pc, gpio, &bank);\n \tif (ret)\n \t\treturn;\n \n-\tmeson_calc_reg_and_bit(bank, pin, REG_OUT, ®, &bit);\n+\tmeson_calc_reg_and_bit(bank, gpio, REG_OUT, ®, &bit);\n \tregmap_update_bits(pc->reg_gpio, reg, BIT(bit),\n \t\t\t value ? BIT(bit) : 0);\n }\n@@ -470,16 +467,15 @@ static void meson_gpio_set(struct gpio_chip *chip, unsigned gpio, int value)\n static int meson_gpio_get(struct gpio_chip *chip, unsigned gpio)\n {\n \tstruct meson_pinctrl *pc = gpiochip_get_data(chip);\n-\tunsigned int reg, bit, val, pin;\n+\tunsigned int reg, bit, val;\n \tstruct meson_bank *bank;\n \tint ret;\n \n-\tpin = pc->data->pin_base + gpio;\n-\tret = meson_get_bank(pc, pin, &bank);\n+\tret = meson_get_bank(pc, gpio, &bank);\n \tif (ret)\n \t\treturn ret;\n \n-\tmeson_calc_reg_and_bit(bank, pin, REG_IN, ®, &bit);\n+\tmeson_calc_reg_and_bit(bank, gpio, REG_IN, ®, &bit);\n \tregmap_read(pc->reg_gpio, reg, &val);\n \n \treturn !!(val & BIT(bit));\ndiff --git a/drivers/pinctrl/meson/pinctrl-meson8.c b/drivers/pinctrl/meson/pinctrl-meson8.c\nindex 7344f8577467..fbf8ecd1c2b6 100644\n--- a/drivers/pinctrl/meson/pinctrl-meson8.c\n+++ b/drivers/pinctrl/meson/pinctrl-meson8.c\n@@ -1046,7 +1046,6 @@ static struct meson_bank meson8_aobus_banks[] = {\n \n struct meson_pinctrl_data meson8_cbus_pinctrl_data = {\n \t.name\t\t= \"cbus-banks\",\n-\t.pin_base\t= 0,\n \t.pins\t\t= meson8_cbus_pins,\n \t.groups\t\t= meson8_cbus_groups,\n \t.funcs\t\t= meson8_cbus_functions,\n@@ -1059,7 +1058,6 @@ struct meson_pinctrl_data meson8_cbus_pinctrl_data = {\n \n struct meson_pinctrl_data meson8_aobus_pinctrl_data = {\n \t.name\t\t= \"ao-bank\",\n-\t.pin_base\t= 0,\n \t.pins\t\t= meson8_aobus_pins,\n \t.groups\t\t= meson8_aobus_groups,\n \t.funcs\t\t= meson8_aobus_functions,\ndiff --git a/drivers/pinctrl/meson/pinctrl-meson8b.c b/drivers/pinctrl/meson/pinctrl-meson8b.c\nindex c3c247bfbc60..7af296db48c8 100644\n--- a/drivers/pinctrl/meson/pinctrl-meson8b.c\n+++ b/drivers/pinctrl/meson/pinctrl-meson8b.c\n@@ -906,7 +906,6 @@ static struct meson_bank meson8b_aobus_banks[] = {\n \n struct meson_pinctrl_data meson8b_cbus_pinctrl_data = {\n \t.name\t\t= \"cbus-banks\",\n-\t.pin_base\t= 0,\n \t.pins\t\t= meson8b_cbus_pins,\n \t.groups\t\t= meson8b_cbus_groups,\n \t.funcs\t\t= meson8b_cbus_functions,\n@@ -919,7 +918,6 @@ struct meson_pinctrl_data meson8b_cbus_pinctrl_data = {\n \n struct meson_pinctrl_data meson8b_aobus_pinctrl_data = {\n \t.name\t\t= \"aobus-banks\",\n-\t.pin_base\t= 0,\n \t.pins\t\t= meson8b_aobus_pins,\n \t.groups\t\t= meson8b_aobus_groups,\n \t.funcs\t\t= meson8b_aobus_functions,\n","prefixes":["6/8"]}