{"id":816148,"url":"http://patchwork.ozlabs.org/api/patches/816148/?format=json","web_url":"http://patchwork.ozlabs.org/project/netdev/patch/1505904778-53217-2-git-send-email-linyunsheng@huawei.com/","project":{"id":7,"url":"http://patchwork.ozlabs.org/api/projects/7/?format=json","name":"Linux network development","link_name":"netdev","list_id":"netdev.vger.kernel.org","list_email":"netdev@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1505904778-53217-2-git-send-email-linyunsheng@huawei.com>","list_archive_url":null,"date":"2017-09-20T10:52:50","name":"[net,1/9] net: hns3: Cleanup for ROCE capability flag in ae_dev","commit_ref":null,"pull_url":null,"state":"accepted","archived":true,"hash":"376fcc5bb3669d4fb5130b02489e245351d4ea20","submitter":{"id":71804,"url":"http://patchwork.ozlabs.org/api/people/71804/?format=json","name":"Yunsheng Lin","email":"linyunsheng@huawei.com"},"delegate":{"id":34,"url":"http://patchwork.ozlabs.org/api/users/34/?format=json","username":"davem","first_name":"David","last_name":"Miller","email":"davem@davemloft.net"},"mbox":"http://patchwork.ozlabs.org/project/netdev/patch/1505904778-53217-2-git-send-email-linyunsheng@huawei.com/mbox/","series":[{"id":4080,"url":"http://patchwork.ozlabs.org/api/series/4080/?format=json","web_url":"http://patchwork.ozlabs.org/project/netdev/list/?series=4080","date":"2017-09-20T10:52:53","name":"TM related bugfixes for the HNS3 Ethernet Driver","version":1,"mbox":"http://patchwork.ozlabs.org/series/4080/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/816148/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/816148/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"patchwork-incoming@ozlabs.org","Delivered-To":"patchwork-incoming@ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=netdev-owner@vger.kernel.org;\n\treceiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xxxWN5Hcpz9s7c\n\tfor ;\n\tWed, 20 Sep 2017 20:56:32 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751965AbdITK4T (ORCPT );\n\tWed, 20 Sep 2017 06:56:19 -0400","from szxga05-in.huawei.com ([45.249.212.191]:6529 \"EHLO\n\tszxga05-in.huawei.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751870AbdITKxX (ORCPT\n\t); Wed, 20 Sep 2017 06:53:23 -0400","from 172.30.72.60 (EHLO DGGEMS407-HUB.china.huawei.com)\n\t([172.30.72.60])\n\tby dggrg05-dlp.huawei.com (MOS 4.4.6-GA FastPath queued)\n\twith ESMTP id DHR76348; Wed, 20 Sep 2017 18:53:20 +0800 (CST)","from localhost.localdomain (10.67.212.75) by\n\tDGGEMS407-HUB.china.huawei.com (10.3.19.207) with Microsoft SMTP\n\tServer id 14.3.301.0; Wed, 20 Sep 2017 18:53:12 +0800"],"From":"Yunsheng Lin ","To":"","CC":", ,\n\t, ,\n\t, ,\n\t, ,\n\t, ,\n\t, ","Subject":"[PATCH net 1/9] net: hns3: Cleanup for ROCE capability flag in\n\tae_dev","Date":"Wed, 20 Sep 2017 18:52:50 +0800","Message-ID":"<1505904778-53217-2-git-send-email-linyunsheng@huawei.com>","X-Mailer":"git-send-email 1.9.1","In-Reply-To":"<1505904778-53217-1-git-send-email-linyunsheng@huawei.com>","References":"<1505904778-53217-1-git-send-email-linyunsheng@huawei.com>","MIME-Version":"1.0","Content-Type":"text/plain","X-Originating-IP":"[10.67.212.75]","X-CFilter-Loop":"Reflected","X-Mirapoint-Virus-RAPID-Raw":"score=unknown(0),\n\trefid=str=0001.0A010203.59C248A0.0013, ss=1, re=0.000, recu=0.000,\n\treip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0,\n\tso=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32","X-Mirapoint-Loop-Id":"200066bc2c897778d2889b06c8179e29","Sender":"netdev-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"netdev@vger.kernel.org"},"content":"This patch add the ROCE supported flag in the driver_data\nfield of pci_device_id, delete roce_pci_tbl and change\nHNAE_DEV_SUPPORT_ROCE_B to HNAE3_DEV_SUPPORT_ROCE_B.\nThis cleanup is done in order to support adding capability\nin pci_device_id and to fix initialization failure when\ncmd is not supported.\n\nSigned-off-by: Yunsheng Lin \n---\n drivers/net/ethernet/hisilicon/hns3/hnae3.h | 5 ++++-\n .../ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 25 ++++------------------\n .../net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.c | 16 +++++++++-----\n 3 files changed, 19 insertions(+), 27 deletions(-)","diff":"diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h\nindex b2f28ae..0f7b61a 100644\n--- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h\n+++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h\n@@ -49,7 +49,10 @@\n #define HNAE3_CLASS_NAME_SIZE 16\n \n #define HNAE3_DEV_INITED_B\t\t\t0x0\n-#define HNAE_DEV_SUPPORT_ROCE_B\t\t\t0x1\n+#define HNAE3_DEV_SUPPORT_ROCE_B\t\t0x1\n+\n+#define hnae3_dev_roce_supported(hdev) \\\n+\thnae_get_bit(hdev->ae_dev->flag, HNAE3_DEV_SUPPORT_ROCE_B)\n \n #define ring_ptr_move_fw(ring, p) \\\n \t((ring)->p = ((ring)->p + 1) % (ring)->desc_num)\ndiff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c\nindex 44c722a..eb78c23 100644\n--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c\n+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c\n@@ -46,17 +46,7 @@ static int hclge_set_mta_filter_mode(struct hclge_dev *hdev,\n \t{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA), 0},\n \t{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA_MACSEC), 0},\n \t{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_MACSEC), 0},\n-\t/* Required last entry */\n-\t{0, }\n-};\n-\n-static const struct pci_device_id roce_pci_tbl[] = {\n-\t{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA), 0},\n-\t{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA_MACSEC), 0},\n-\t{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA), 0},\n-\t{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA_MACSEC), 0},\n-\t{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_MACSEC), 0},\n-\t/* Required last entry */\n+\t/* required last entry */\n \t{0, }\n };\n \n@@ -894,7 +884,7 @@ static int hclge_query_pf_resource(struct hclge_dev *hdev)\n \thdev->num_tqps = __le16_to_cpu(req->tqp_num);\n \thdev->pkt_buf_size = __le16_to_cpu(req->buf_size) << HCLGE_BUF_UNIT_S;\n \n-\tif (hnae_get_bit(hdev->ae_dev->flag, HNAE_DEV_SUPPORT_ROCE_B)) {\n+\tif (hnae3_dev_roce_supported(hdev)) {\n \t\thdev->num_roce_msix =\n \t\thnae_get_field(__le16_to_cpu(req->pf_intr_vector_number),\n \t\t\t HCLGE_PF_VEC_NUM_M, HCLGE_PF_VEC_NUM_S);\n@@ -3931,8 +3921,7 @@ static int hclge_init_client_instance(struct hnae3_client *client,\n \t\t\t\tgoto err;\n \n \t\t\tif (hdev->roce_client &&\n-\t\t\t hnae_get_bit(hdev->ae_dev->flag,\n-\t\t\t\t\t HNAE_DEV_SUPPORT_ROCE_B)) {\n+\t\t\t hnae3_dev_roce_supported(hdev)) {\n \t\t\t\tstruct hnae3_client *rc = hdev->roce_client;\n \n \t\t\t\tret = hclge_init_roce_base_info(vport);\n@@ -3955,8 +3944,7 @@ static int hclge_init_client_instance(struct hnae3_client *client,\n \n \t\t\tbreak;\n \t\tcase HNAE3_CLIENT_ROCE:\n-\t\t\tif (hnae_get_bit(hdev->ae_dev->flag,\n-\t\t\t\t\t HNAE_DEV_SUPPORT_ROCE_B)) {\n+\t\t\tif (hnae3_dev_roce_supported(hdev)) {\n \t\t\t\thdev->roce_client = client;\n \t\t\t\tvport->roce.client = client;\n \t\t\t}\n@@ -4068,7 +4056,6 @@ static void hclge_pci_uninit(struct hclge_dev *hdev)\n static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev)\n {\n \tstruct pci_dev *pdev = ae_dev->pdev;\n-\tconst struct pci_device_id *id;\n \tstruct hclge_dev *hdev;\n \tint ret;\n \n@@ -4083,10 +4070,6 @@ static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev)\n \thdev->ae_dev = ae_dev;\n \tae_dev->priv = hdev;\n \n-\tid = pci_match_id(roce_pci_tbl, ae_dev->pdev);\n-\tif (id)\n-\t\thnae_set_bit(ae_dev->flag, HNAE_DEV_SUPPORT_ROCE_B, 1);\n-\n \tret = hclge_pci_init(hdev);\n \tif (ret) {\n \t\tdev_err(&pdev->dev, \"PCI init failed\\n\");\ndiff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.c\nindex 4d68d6e..94d8bb5 100644\n--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.c\n+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.c\n@@ -41,11 +41,16 @@\n static const struct pci_device_id hns3_pci_tbl[] = {\n \t{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_GE), 0},\n \t{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE), 0},\n-\t{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA), 0},\n-\t{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA_MACSEC), 0},\n-\t{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA), 0},\n-\t{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA_MACSEC), 0},\n-\t{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_MACSEC), 0},\n+\t{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA),\n+\t BIT(HNAE3_DEV_SUPPORT_ROCE_B)},\n+\t{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA_MACSEC),\n+\t BIT(HNAE3_DEV_SUPPORT_ROCE_B)},\n+\t{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA),\n+\t BIT(HNAE3_DEV_SUPPORT_ROCE_B)},\n+\t{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA_MACSEC),\n+\t BIT(HNAE3_DEV_SUPPORT_ROCE_B)},\n+\t{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_MACSEC),\n+\t BIT(HNAE3_DEV_SUPPORT_ROCE_B)},\n \t/* required last entry */\n \t{0, }\n };\n@@ -1348,6 +1353,7 @@ static int hns3_probe(struct pci_dev *pdev, const struct pci_device_id *ent)\n \t}\n \n \tae_dev->pdev = pdev;\n+\tae_dev->flag = ent->driver_data;\n \tae_dev->dev_type = HNAE3_DEV_KNIC;\n \tpci_set_drvdata(pdev, ae_dev);\n \n","prefixes":["net","1/9"]}