{"id":816147,"url":"http://patchwork.ozlabs.org/api/patches/816147/?format=json","web_url":"http://patchwork.ozlabs.org/project/netdev/patch/1505904778-53217-3-git-send-email-linyunsheng@huawei.com/","project":{"id":7,"url":"http://patchwork.ozlabs.org/api/projects/7/?format=json","name":"Linux network development","link_name":"netdev","list_id":"netdev.vger.kernel.org","list_email":"netdev@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1505904778-53217-3-git-send-email-linyunsheng@huawei.com>","list_archive_url":null,"date":"2017-09-20T10:52:51","name":"[net,2/9] net: hns3: Fix initialization when cmd is not supported","commit_ref":null,"pull_url":null,"state":"accepted","archived":true,"hash":"6f110dc7baef563c0b1c924d50413ebc0bc0ac47","submitter":{"id":71804,"url":"http://patchwork.ozlabs.org/api/people/71804/?format=json","name":"Yunsheng Lin","email":"linyunsheng@huawei.com"},"delegate":{"id":34,"url":"http://patchwork.ozlabs.org/api/users/34/?format=json","username":"davem","first_name":"David","last_name":"Miller","email":"davem@davemloft.net"},"mbox":"http://patchwork.ozlabs.org/project/netdev/patch/1505904778-53217-3-git-send-email-linyunsheng@huawei.com/mbox/","series":[{"id":4080,"url":"http://patchwork.ozlabs.org/api/series/4080/?format=json","web_url":"http://patchwork.ozlabs.org/project/netdev/list/?series=4080","date":"2017-09-20T10:52:53","name":"TM related bugfixes for the HNS3 Ethernet Driver","version":1,"mbox":"http://patchwork.ozlabs.org/series/4080/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/816147/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/816147/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"patchwork-incoming@ozlabs.org","Delivered-To":"patchwork-incoming@ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=netdev-owner@vger.kernel.org;\n\treceiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xxxW10Dgrz9s7c\n\tfor ;\n\tWed, 20 Sep 2017 20:56:13 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751894AbdITKxY (ORCPT );\n\tWed, 20 Sep 2017 06:53:24 -0400","from szxga05-in.huawei.com ([45.249.212.191]:6528 \"EHLO\n\tszxga05-in.huawei.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751825AbdITKxX (ORCPT\n\t); Wed, 20 Sep 2017 06:53:23 -0400","from 172.30.72.60 (EHLO DGGEMS407-HUB.china.huawei.com)\n\t([172.30.72.60])\n\tby dggrg05-dlp.huawei.com (MOS 4.4.6-GA FastPath queued)\n\twith ESMTP id DHR76347; Wed, 20 Sep 2017 18:53:19 +0800 (CST)","from localhost.localdomain (10.67.212.75) by\n\tDGGEMS407-HUB.china.huawei.com (10.3.19.207) with Microsoft SMTP\n\tServer id 14.3.301.0; Wed, 20 Sep 2017 18:53:12 +0800"],"From":"Yunsheng Lin ","To":"","CC":", ,\n\t, ,\n\t, ,\n\t, ,\n\t, ,\n\t, ","Subject":"[PATCH net 2/9] net: hns3: Fix initialization when cmd is not\n\tsupported","Date":"Wed, 20 Sep 2017 18:52:51 +0800","Message-ID":"<1505904778-53217-3-git-send-email-linyunsheng@huawei.com>","X-Mailer":"git-send-email 1.9.1","In-Reply-To":"<1505904778-53217-1-git-send-email-linyunsheng@huawei.com>","References":"<1505904778-53217-1-git-send-email-linyunsheng@huawei.com>","MIME-Version":"1.0","Content-Type":"text/plain","X-Originating-IP":"[10.67.212.75]","X-CFilter-Loop":"Reflected","X-Mirapoint-Virus-RAPID-Raw":"score=unknown(0),\n\trefid=str=0001.0A010203.59C248A0.000D, ss=1, re=0.000, recu=0.000,\n\treip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0,\n\tso=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32","X-Mirapoint-Loop-Id":"2e95f8b6370fe504d22c78fc564180bc","Sender":"netdev-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"netdev@vger.kernel.org"},"content":"When ae_dev doesn't support DCB, rx_priv_wl_config,\ncommon_thrd_config and tm_qs_bp_cfg can't be called, otherwise\ncmd return fail, which causes the hclge module initialization\nprocess to fail.\nThis patch fix it by adding a DCB capability flag to check if\nthe ae_dev support DCB.\n\nFixes: 46a3df9f9718 (\"net: hns3: Add HNS3 Acceleration Engine & Compatibility Layer Support\")\nSigned-off-by: Yunsheng Lin \n---\n drivers/net/ethernet/hisilicon/hns3/hnae3.h | 7 ++++++\n .../ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 26 +++++++++++++---------\n .../net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c | 4 ++++\n .../net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.c | 10 ++++-----\n 4 files changed, 31 insertions(+), 16 deletions(-)","diff":"diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h\nindex 0f7b61a..ad685f5 100644\n--- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h\n+++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h\n@@ -50,10 +50,17 @@\n \n #define HNAE3_DEV_INITED_B\t\t\t0x0\n #define HNAE3_DEV_SUPPORT_ROCE_B\t\t0x1\n+#define HNAE3_DEV_SUPPORT_DCB_B\t\t\t0x2\n+\n+#define HNAE3_DEV_SUPPORT_ROCE_DCB_BITS (BIT(HNAE3_DEV_SUPPORT_DCB_B) |\\\n+\t\tBIT(HNAE3_DEV_SUPPORT_ROCE_B))\n \n #define hnae3_dev_roce_supported(hdev) \\\n \thnae_get_bit(hdev->ae_dev->flag, HNAE3_DEV_SUPPORT_ROCE_B)\n \n+#define hnae3_dev_dcb_supported(hdev) \\\n+\thnae_get_bit(hdev->ae_dev->flag, HNAE3_DEV_SUPPORT_DCB_B)\n+\n #define ring_ptr_move_fw(ring, p) \\\n \t((ring)->p = ((ring)->p + 1) % (ring)->desc_num)\n #define ring_ptr_move_bw(ring, p) \\\ndiff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c\nindex eb78c23..c515b84 100644\n--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c\n+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c\n@@ -1772,18 +1772,22 @@ int hclge_buffer_alloc(struct hclge_dev *hdev)\n \t\treturn ret;\n \t}\n \n-\tret = hclge_rx_priv_wl_config(hdev);\n-\tif (ret) {\n-\t\tdev_err(&hdev->pdev->dev,\n-\t\t\t\"could not configure rx private waterline %d\\n\", ret);\n-\t\treturn ret;\n-\t}\n+\tif (hnae3_dev_dcb_supported(hdev)) {\n+\t\tret = hclge_rx_priv_wl_config(hdev);\n+\t\tif (ret) {\n+\t\t\tdev_err(&hdev->pdev->dev,\n+\t\t\t\t\"could not configure rx private waterline %d\\n\",\n+\t\t\t\tret);\n+\t\t\treturn ret;\n+\t\t}\n \n-\tret = hclge_common_thrd_config(hdev);\n-\tif (ret) {\n-\t\tdev_err(&hdev->pdev->dev,\n-\t\t\t\"could not configure common threshold %d\\n\", ret);\n-\t\treturn ret;\n+\t\tret = hclge_common_thrd_config(hdev);\n+\t\tif (ret) {\n+\t\t\tdev_err(&hdev->pdev->dev,\n+\t\t\t\t\"could not configure common threshold %d\\n\",\n+\t\t\t\tret);\n+\t\t\treturn ret;\n+\t\t}\n \t}\n \n \tret = hclge_common_wl_config(hdev);\ndiff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c\nindex 1c577d2..c91dbf1 100644\n--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c\n+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c\n@@ -976,6 +976,10 @@ int hclge_pause_setup_hw(struct hclge_dev *hdev)\n \tif (ret)\n \t\treturn ret;\n \n+\t/* Only DCB-supported dev supports qset back pressure setting */\n+\tif (!hnae3_dev_dcb_supported(hdev))\n+\t\treturn 0;\n+\n \tfor (i = 0; i < hdev->tm_info.num_tc; i++) {\n \t\tret = hclge_tm_qs_bp_cfg(hdev, i);\n \t\tif (ret)\ndiff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.c\nindex 94d8bb5..35369e1 100644\n--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.c\n+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hns3_enet.c\n@@ -42,15 +42,15 @@\n \t{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_GE), 0},\n \t{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE), 0},\n \t{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA),\n-\t BIT(HNAE3_DEV_SUPPORT_ROCE_B)},\n+\t HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},\n \t{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_25GE_RDMA_MACSEC),\n-\t BIT(HNAE3_DEV_SUPPORT_ROCE_B)},\n+\t HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},\n \t{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA),\n-\t BIT(HNAE3_DEV_SUPPORT_ROCE_B)},\n+\t HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},\n \t{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_50GE_RDMA_MACSEC),\n-\t BIT(HNAE3_DEV_SUPPORT_ROCE_B)},\n+\t HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},\n \t{PCI_VDEVICE(HUAWEI, HNAE3_DEV_ID_100G_RDMA_MACSEC),\n-\t BIT(HNAE3_DEV_SUPPORT_ROCE_B)},\n+\t HNAE3_DEV_SUPPORT_ROCE_DCB_BITS},\n \t/* required last entry */\n \t{0, }\n };\n","prefixes":["net","2/9"]}