{"id":815774,"url":"http://patchwork.ozlabs.org/api/patches/815774/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20170919182745.90280-4-pasic@linux.vnet.ibm.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170919182745.90280-4-pasic@linux.vnet.ibm.com>","list_archive_url":null,"date":"2017-09-19T18:27:43","name":"[v3,3/5] virtio-ccw: use ccw data stream","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"d7243fbe93055543eab6f504284e597079c67a9f","submitter":{"id":68297,"url":"http://patchwork.ozlabs.org/api/people/68297/?format=json","name":"Halil Pasic","email":"pasic@linux.vnet.ibm.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20170919182745.90280-4-pasic@linux.vnet.ibm.com/mbox/","series":[{"id":3944,"url":"http://patchwork.ozlabs.org/api/series/3944/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=3944","date":"2017-09-19T18:27:40","name":"add CCW indirect data access support","version":3,"mbox":"http://patchwork.ozlabs.org/series/3944/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/815774/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/815774/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xxWhT21mrz9sBZ\n\tfor ;\n\tWed, 20 Sep 2017 04:32:57 +1000 (AEST)","from localhost ([::1]:44783 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t)\n\tid 1duNKJ-0007DJ-3O\n\tfor incoming@patchwork.ozlabs.org; Tue, 19 Sep 2017 14:32:55 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:53061)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from ) id 1duNFZ-0003oB-JD\n\tfor qemu-devel@nongnu.org; Tue, 19 Sep 2017 14:28:06 -0400","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from ) id 1duNFV-0002Jy-2u\n\tfor qemu-devel@nongnu.org; Tue, 19 Sep 2017 14:28:01 -0400","from mx0b-001b2d01.pphosted.com ([148.163.158.5]:36298\n\thelo=mx0a-001b2d01.pphosted.com)\n\tby eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from )\n\tid 1duNFU-0002J8-U3\n\tfor qemu-devel@nongnu.org; Tue, 19 Sep 2017 14:27:57 -0400","from pps.filterd (m0098414.ppops.net [127.0.0.1])\n\tby mx0b-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv8JIOG9E030300\n\tfor ; Tue, 19 Sep 2017 14:27:56 -0400","from e06smtp12.uk.ibm.com (e06smtp12.uk.ibm.com [195.75.94.108])\n\tby mx0b-001b2d01.pphosted.com with ESMTP id 2d35nf2fev-1\n\t(version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT)\n\tfor ; Tue, 19 Sep 2017 14:27:55 -0400","from localhost\n\tby e06smtp12.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use\n\tOnly! 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Violators will be prosecuted; \n\tTue, 19 Sep 2017 19:27:51 +0100","from d06av24.portsmouth.uk.ibm.com (d06av24.portsmouth.uk.ibm.com\n\t[9.149.105.60])\n\tby b06cxnps3075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with\n\tESMTP id v8JIRp5m30408932; Tue, 19 Sep 2017 18:27:51 GMT","from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1])\n\tby IMSVA (Postfix) with ESMTP id 4B7CB42041;\n\tTue, 19 Sep 2017 19:24:03 +0100 (BST)","from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1])\n\tby IMSVA (Postfix) with ESMTP id 12E004203F;\n\tTue, 19 Sep 2017 19:24:03 +0100 (BST)","from tuxmaker.boeblingen.de.ibm.com (unknown [9.152.85.9])\n\tby d06av24.portsmouth.uk.ibm.com (Postfix) with ESMTPS;\n\tTue, 19 Sep 2017 19:24:03 +0100 (BST)"],"From":"Halil Pasic ","To":"Cornelia Huck ","Date":"Tue, 19 Sep 2017 20:27:43 +0200","X-Mailer":"git-send-email 2.13.5","In-Reply-To":"<20170919182745.90280-1-pasic@linux.vnet.ibm.com>","References":"<20170919182745.90280-1-pasic@linux.vnet.ibm.com>","X-TM-AS-GCONF":"00","x-cbid":"17091918-0008-0000-0000-00000498717E","X-IBM-AV-DETECTION":"SAVI=unused REMOTE=unused XFE=unused","x-cbparentid":"17091918-0009-0000-0000-00001E29A44C","Message-Id":"<20170919182745.90280-4-pasic@linux.vnet.ibm.com>","X-Proofpoint-Virus-Version":"vendor=fsecure engine=2.50.10432:, ,\n\tdefinitions=2017-09-19_08:, , signatures=0","X-Proofpoint-Spam-Details":"rule=outbound_notspam policy=outbound score=0\n\tspamscore=0 suspectscore=0\n\tmalwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam\n\tadjust=0 reason=mlx scancount=1 engine=8.0.1-1707230000\n\tdefinitions=main-1709190256","X-detected-operating-system":"by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy]","X-Received-From":"148.163.158.5","Subject":"[Qemu-devel] [PATCH v3 3/5] virtio-ccw: use ccw data stream","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Dong Jia Shi ,\n\tHalil Pasic ,\n\tPierre Morel , qemu-devel@nongnu.org","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"},"content":"Replace direct access which implicitly assumes no IDA\nor MIDA with the new ccw data stream interface which should\ncope with these transparently in the future.\n\nSigned-off-by: Halil Pasic \nReviewed-by: Pierre Morel\n---\n hw/s390x/virtio-ccw.c | 157 +++++++++++++++-----------------------------------\n 1 file changed, 46 insertions(+), 111 deletions(-)","diff":"diff --git a/hw/s390x/virtio-ccw.c b/hw/s390x/virtio-ccw.c\nindex b1976fdd19..d024f8b2d3 100644\n--- a/hw/s390x/virtio-ccw.c\n+++ b/hw/s390x/virtio-ccw.c\n@@ -287,49 +287,19 @@ static int virtio_ccw_handle_set_vq(SubchDev *sch, CCW1 ccw, bool check_len,\n return -EFAULT;\n }\n if (is_legacy) {\n- linfo.queue = address_space_ldq_be(&address_space_memory, ccw.cda,\n- MEMTXATTRS_UNSPECIFIED, NULL);\n- linfo.align = address_space_ldl_be(&address_space_memory,\n- ccw.cda + sizeof(linfo.queue),\n- MEMTXATTRS_UNSPECIFIED,\n- NULL);\n- linfo.index = address_space_lduw_be(&address_space_memory,\n- ccw.cda + sizeof(linfo.queue)\n- + sizeof(linfo.align),\n- MEMTXATTRS_UNSPECIFIED,\n- NULL);\n- linfo.num = address_space_lduw_be(&address_space_memory,\n- ccw.cda + sizeof(linfo.queue)\n- + sizeof(linfo.align)\n- + sizeof(linfo.index),\n- MEMTXATTRS_UNSPECIFIED,\n- NULL);\n+ ccw_dstream_read(&sch->cds, linfo);\n+ be64_to_cpus(&linfo.queue);\n+ be32_to_cpus(&linfo.align);\n+ be16_to_cpus(&linfo.index);\n+ be16_to_cpus(&linfo.num);\n ret = virtio_ccw_set_vqs(sch, NULL, &linfo);\n } else {\n- info.desc = address_space_ldq_be(&address_space_memory, ccw.cda,\n- MEMTXATTRS_UNSPECIFIED, NULL);\n- info.index = address_space_lduw_be(&address_space_memory,\n- ccw.cda + sizeof(info.desc)\n- + sizeof(info.res0),\n- MEMTXATTRS_UNSPECIFIED, NULL);\n- info.num = address_space_lduw_be(&address_space_memory,\n- ccw.cda + sizeof(info.desc)\n- + sizeof(info.res0)\n- + sizeof(info.index),\n- MEMTXATTRS_UNSPECIFIED, NULL);\n- info.avail = address_space_ldq_be(&address_space_memory,\n- ccw.cda + sizeof(info.desc)\n- + sizeof(info.res0)\n- + sizeof(info.index)\n- + sizeof(info.num),\n- MEMTXATTRS_UNSPECIFIED, NULL);\n- info.used = address_space_ldq_be(&address_space_memory,\n- ccw.cda + sizeof(info.desc)\n- + sizeof(info.res0)\n- + sizeof(info.index)\n- + sizeof(info.num)\n- + sizeof(info.avail),\n- MEMTXATTRS_UNSPECIFIED, NULL);\n+ ccw_dstream_read(&sch->cds, info);\n+ be64_to_cpus(&info.desc);\n+ be16_to_cpus(&info.index);\n+ be16_to_cpus(&info.num);\n+ be64_to_cpus(&info.avail);\n+ be64_to_cpus(&info.used);\n ret = virtio_ccw_set_vqs(sch, &info, NULL);\n }\n sch->curr_status.scsw.count = 0;\n@@ -342,15 +312,13 @@ static int virtio_ccw_cb(SubchDev *sch, CCW1 ccw)\n VirtioRevInfo revinfo;\n uint8_t status;\n VirtioFeatDesc features;\n- void *config;\n hwaddr indicators;\n VqConfigBlock vq_config;\n VirtioCcwDevice *dev = sch->driver_data;\n VirtIODevice *vdev = virtio_ccw_get_vdev(sch);\n bool check_len;\n int len;\n- hwaddr hw_len;\n- VirtioThinintInfo *thinint;\n+ VirtioThinintInfo thinint;\n \n if (!dev) {\n return -EINVAL;\n@@ -394,11 +362,8 @@ static int virtio_ccw_cb(SubchDev *sch, CCW1 ccw)\n } else {\n VirtioDeviceClass *vdc = VIRTIO_DEVICE_GET_CLASS(vdev);\n \n- features.index = address_space_ldub(&address_space_memory,\n- ccw.cda\n- + sizeof(features.features),\n- MEMTXATTRS_UNSPECIFIED,\n- NULL);\n+ ccw_dstream_advance(&sch->cds, sizeof(features.features));\n+ ccw_dstream_read(&sch->cds, features.index);\n if (features.index == 0) {\n if (dev->revision >= 1) {\n /* Don't offer legacy features for modern devices. */\n@@ -417,9 +382,9 @@ static int virtio_ccw_cb(SubchDev *sch, CCW1 ccw)\n /* Return zeroes if the guest supports more feature bits. */\n features.features = 0;\n }\n- address_space_stl_le(&address_space_memory, ccw.cda,\n- features.features, MEMTXATTRS_UNSPECIFIED,\n- NULL);\n+ ccw_dstream_rewind(&sch->cds);\n+ cpu_to_le32s(&features.features);\n+ ccw_dstream_write(&sch->cds, features.features);\n sch->curr_status.scsw.count = ccw.count - sizeof(features);\n ret = 0;\n }\n@@ -438,15 +403,8 @@ static int virtio_ccw_cb(SubchDev *sch, CCW1 ccw)\n if (!ccw.cda) {\n ret = -EFAULT;\n } else {\n- features.index = address_space_ldub(&address_space_memory,\n- ccw.cda\n- + sizeof(features.features),\n- MEMTXATTRS_UNSPECIFIED,\n- NULL);\n- features.features = address_space_ldl_le(&address_space_memory,\n- ccw.cda,\n- MEMTXATTRS_UNSPECIFIED,\n- NULL);\n+ ccw_dstream_read(&sch->cds, features);\n+ le32_to_cpus(&features.features);\n if (features.index == 0) {\n virtio_set_features(vdev,\n (vdev->guest_features & 0xffffffff00000000ULL) |\n@@ -487,8 +445,7 @@ static int virtio_ccw_cb(SubchDev *sch, CCW1 ccw)\n ret = -EFAULT;\n } else {\n virtio_bus_get_vdev_config(&dev->bus, vdev->config);\n- /* XXX config space endianness */\n- cpu_physical_memory_write(ccw.cda, vdev->config, len);\n+ ccw_dstream_write_buf(&sch->cds, vdev->config, len);\n sch->curr_status.scsw.count = ccw.count - len;\n ret = 0;\n }\n@@ -501,21 +458,13 @@ static int virtio_ccw_cb(SubchDev *sch, CCW1 ccw)\n }\n }\n len = MIN(ccw.count, vdev->config_len);\n- hw_len = len;\n if (!ccw.cda) {\n ret = -EFAULT;\n } else {\n- config = cpu_physical_memory_map(ccw.cda, &hw_len, 0);\n- if (!config) {\n- ret = -EFAULT;\n- } else {\n- len = hw_len;\n- /* XXX config space endianness */\n- memcpy(vdev->config, config, len);\n- cpu_physical_memory_unmap(config, hw_len, 0, hw_len);\n+ ret = ccw_dstream_read_buf(&sch->cds, vdev->config, len);\n+ if (!ret) {\n virtio_bus_set_vdev_config(&dev->bus, vdev->config);\n sch->curr_status.scsw.count = ccw.count - len;\n- ret = 0;\n }\n }\n break;\n@@ -553,8 +502,7 @@ static int virtio_ccw_cb(SubchDev *sch, CCW1 ccw)\n if (!ccw.cda) {\n ret = -EFAULT;\n } else {\n- status = address_space_ldub(&address_space_memory, ccw.cda,\n- MEMTXATTRS_UNSPECIFIED, NULL);\n+ ccw_dstream_read(&sch->cds, status);\n if (!(status & VIRTIO_CONFIG_S_DRIVER_OK)) {\n virtio_ccw_stop_ioeventfd(dev);\n }\n@@ -597,8 +545,8 @@ static int virtio_ccw_cb(SubchDev *sch, CCW1 ccw)\n if (!ccw.cda) {\n ret = -EFAULT;\n } else {\n- indicators = address_space_ldq_be(&address_space_memory, ccw.cda,\n- MEMTXATTRS_UNSPECIFIED, NULL);\n+ ccw_dstream_read(&sch->cds, indicators);\n+ be64_to_cpus(&indicators);\n dev->indicators = get_indicator(indicators, sizeof(uint64_t));\n sch->curr_status.scsw.count = ccw.count - sizeof(indicators);\n ret = 0;\n@@ -618,8 +566,8 @@ static int virtio_ccw_cb(SubchDev *sch, CCW1 ccw)\n if (!ccw.cda) {\n ret = -EFAULT;\n } else {\n- indicators = address_space_ldq_be(&address_space_memory, ccw.cda,\n- MEMTXATTRS_UNSPECIFIED, NULL);\n+ ccw_dstream_read(&sch->cds, indicators);\n+ be64_to_cpus(&indicators);\n dev->indicators2 = get_indicator(indicators, sizeof(uint64_t));\n sch->curr_status.scsw.count = ccw.count - sizeof(indicators);\n ret = 0;\n@@ -639,67 +587,58 @@ static int virtio_ccw_cb(SubchDev *sch, CCW1 ccw)\n if (!ccw.cda) {\n ret = -EFAULT;\n } else {\n- vq_config.index = address_space_lduw_be(&address_space_memory,\n- ccw.cda,\n- MEMTXATTRS_UNSPECIFIED,\n- NULL);\n+ ccw_dstream_read(&sch->cds, vq_config.index);\n+ be16_to_cpus(&vq_config.index);\n if (vq_config.index >= VIRTIO_QUEUE_MAX) {\n ret = -EINVAL;\n break;\n }\n vq_config.num_max = virtio_queue_get_num(vdev,\n vq_config.index);\n- address_space_stw_be(&address_space_memory,\n- ccw.cda + sizeof(vq_config.index),\n- vq_config.num_max,\n- MEMTXATTRS_UNSPECIFIED,\n- NULL);\n+ cpu_to_be16s(&vq_config.num_max);\n+ ccw_dstream_write(&sch->cds, vq_config.num_max);\n sch->curr_status.scsw.count = ccw.count - sizeof(vq_config);\n ret = 0;\n }\n break;\n case CCW_CMD_SET_IND_ADAPTER:\n if (check_len) {\n- if (ccw.count != sizeof(*thinint)) {\n+ if (ccw.count != sizeof(thinint)) {\n ret = -EINVAL;\n break;\n }\n- } else if (ccw.count < sizeof(*thinint)) {\n+ } else if (ccw.count < sizeof(thinint)) {\n /* Can't execute command. */\n ret = -EINVAL;\n break;\n }\n- len = sizeof(*thinint);\n- hw_len = len;\n if (!ccw.cda) {\n ret = -EFAULT;\n } else if (dev->indicators && !sch->thinint_active) {\n /* Trigger a command reject. */\n ret = -ENOSYS;\n } else {\n- thinint = cpu_physical_memory_map(ccw.cda, &hw_len, 0);\n- if (!thinint) {\n+ if (ccw_dstream_read(&sch->cds, thinint)) {\n ret = -EFAULT;\n } else {\n- uint64_t ind_bit = ldq_be_p(&thinint->ind_bit);\n+ be64_to_cpus(&thinint.ind_bit);\n+ be64_to_cpus(&thinint.summary_indicator);\n+ be64_to_cpus(&thinint.device_indicator);\n \n- len = hw_len;\n dev->summary_indicator =\n- get_indicator(ldq_be_p(&thinint->summary_indicator),\n- sizeof(uint8_t));\n+ get_indicator(thinint.summary_indicator, sizeof(uint8_t));\n dev->indicators =\n- get_indicator(ldq_be_p(&thinint->device_indicator),\n- ind_bit / 8 + 1);\n- dev->thinint_isc = thinint->isc;\n- dev->routes.adapter.ind_offset = ind_bit;\n+ get_indicator(thinint.device_indicator,\n+ thinint.ind_bit / 8 + 1);\n+ dev->thinint_isc = thinint.isc;\n+ dev->routes.adapter.ind_offset = thinint.ind_bit;\n dev->routes.adapter.summary_offset = 7;\n- cpu_physical_memory_unmap(thinint, hw_len, 0, hw_len);\n dev->routes.adapter.adapter_id = css_get_adapter_id(\n CSS_IO_ADAPTER_VIRTIO,\n dev->thinint_isc);\n sch->thinint_active = ((dev->indicators != NULL) &&\n (dev->summary_indicator != NULL));\n- sch->curr_status.scsw.count = ccw.count - len;\n+ sch->curr_status.scsw.count = ccw.count - sizeof(thinint);\n ret = 0;\n }\n }\n@@ -714,13 +653,9 @@ static int virtio_ccw_cb(SubchDev *sch, CCW1 ccw)\n ret = -EFAULT;\n break;\n }\n- revinfo.revision =\n- address_space_lduw_be(&address_space_memory, ccw.cda,\n- MEMTXATTRS_UNSPECIFIED, NULL);\n- revinfo.length =\n- address_space_lduw_be(&address_space_memory,\n- ccw.cda + sizeof(revinfo.revision),\n- MEMTXATTRS_UNSPECIFIED, NULL);\n+ ccw_dstream_read_buf(&sch->cds, &revinfo, 4);\n+ be16_to_cpus(&revinfo.revision);\n+ be16_to_cpus(&revinfo.length);\n if (ccw.count < len + revinfo.length ||\n (check_len && ccw.count > len + revinfo.length)) {\n ret = -EINVAL;\n","prefixes":["v3","3/5"]}