{"id":815772,"url":"http://patchwork.ozlabs.org/api/patches/815772/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20170919182745.90280-6-pasic@linux.vnet.ibm.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170919182745.90280-6-pasic@linux.vnet.ibm.com>","list_archive_url":null,"date":"2017-09-19T18:27:45","name":"[v3,5/5] s390x/css: support ccw IDA","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"bebe4f5c06314a0d14164cc74ef5c648526efde0","submitter":{"id":68297,"url":"http://patchwork.ozlabs.org/api/people/68297/?format=json","name":"Halil Pasic","email":"pasic@linux.vnet.ibm.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20170919182745.90280-6-pasic@linux.vnet.ibm.com/mbox/","series":[{"id":3944,"url":"http://patchwork.ozlabs.org/api/series/3944/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=3944","date":"2017-09-19T18:27:40","name":"add CCW indirect data access support","version":3,"mbox":"http://patchwork.ozlabs.org/series/3944/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/815772/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/815772/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xxWf5144Vz9sBZ\n\tfor ;\n\tWed, 20 Sep 2017 04:30:52 +1000 (AEST)","from localhost ([::1]:44777 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t)\n\tid 1duNII-0005dl-AI\n\tfor incoming@patchwork.ozlabs.org; Tue, 19 Sep 2017 14:30:50 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:53049)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from ) id 1duNFY-0003no-VP\n\tfor qemu-devel@nongnu.org; Tue, 19 Sep 2017 14:28:02 -0400","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from ) id 1duNFX-0002PY-RU\n\tfor qemu-devel@nongnu.org; Tue, 19 Sep 2017 14:28:00 -0400","from mx0b-001b2d01.pphosted.com ([148.163.158.5]:43830\n\thelo=mx0a-001b2d01.pphosted.com)\n\tby eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from )\n\tid 1duNFX-0002Oj-M8\n\tfor qemu-devel@nongnu.org; Tue, 19 Sep 2017 14:27:59 -0400","from pps.filterd (m0098413.ppops.net [127.0.0.1])\n\tby mx0b-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv8JIOH0A010652\n\tfor ; Tue, 19 Sep 2017 14:27:59 -0400","from e06smtp14.uk.ibm.com (e06smtp14.uk.ibm.com [195.75.94.110])\n\tby mx0b-001b2d01.pphosted.com with ESMTP id 2d374nn5gv-1\n\t(version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT)\n\tfor ; Tue, 19 Sep 2017 14:27:59 -0400","from localhost\n\tby e06smtp14.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use\n\tOnly! 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Violators will be prosecuted; \n\tTue, 19 Sep 2017 19:27:54 +0100","from d06av24.portsmouth.uk.ibm.com (mk.ibm.com [9.149.105.60])\n\tby b06cxnps4076.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with\n\tESMTP id v8JIRrdc17367072; Tue, 19 Sep 2017 18:27:53 GMT","from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1])\n\tby IMSVA (Postfix) with ESMTP id BBFBA42041;\n\tTue, 19 Sep 2017 19:24:05 +0100 (BST)","from d06av24.portsmouth.uk.ibm.com (unknown [127.0.0.1])\n\tby IMSVA (Postfix) with ESMTP id 8E2484203F;\n\tTue, 19 Sep 2017 19:24:05 +0100 (BST)","from tuxmaker.boeblingen.de.ibm.com (unknown [9.152.85.9])\n\tby d06av24.portsmouth.uk.ibm.com (Postfix) with ESMTPS;\n\tTue, 19 Sep 2017 19:24:05 +0100 (BST)"],"From":"Halil Pasic ","To":"Cornelia Huck ","Date":"Tue, 19 Sep 2017 20:27:45 +0200","X-Mailer":"git-send-email 2.13.5","In-Reply-To":"<20170919182745.90280-1-pasic@linux.vnet.ibm.com>","References":"<20170919182745.90280-1-pasic@linux.vnet.ibm.com>","X-TM-AS-GCONF":"00","x-cbid":"17091918-0016-0000-0000-000004EE746B","X-IBM-AV-DETECTION":"SAVI=unused REMOTE=unused XFE=unused","x-cbparentid":"17091918-0017-0000-0000-00002828A8F8","Message-Id":"<20170919182745.90280-6-pasic@linux.vnet.ibm.com>","X-Proofpoint-Virus-Version":"vendor=fsecure engine=2.50.10432:, ,\n\tdefinitions=2017-09-19_08:, , signatures=0","X-Proofpoint-Spam-Details":"rule=outbound_notspam policy=outbound score=0\n\tspamscore=0 suspectscore=0\n\tmalwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam\n\tadjust=0 reason=mlx scancount=1 engine=8.0.1-1707230000\n\tdefinitions=main-1709190256","X-detected-operating-system":"by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy]","X-Received-From":"148.163.158.5","Subject":"[Qemu-devel] [PATCH v3 5/5] s390x/css: support ccw IDA","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Dong Jia Shi ,\n\tHalil Pasic ,\n\tPierre Morel , qemu-devel@nongnu.org","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"},"content":"Let's add indirect data addressing support for our virtual channel\nsubsystem. This implementation does not bother with any kind of\nprefetching. We simply step through the IDAL on demand.\n\nSigned-off-by: Halil Pasic \nSigned-off-by: Cornelia Huck \n---\n hw/s390x/css.c | 117 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++-\n 1 file changed, 116 insertions(+), 1 deletion(-)","diff":"diff --git a/hw/s390x/css.c b/hw/s390x/css.c\nindex 2d37a9ddde..a3ce6d89b6 100644\n--- a/hw/s390x/css.c\n+++ b/hw/s390x/css.c\n@@ -827,6 +827,121 @@ incr:\n return 0;\n }\n \n+/* returns values between 1 and bsz, where bsz is a power of 2 */\n+static inline uint16_t ida_continuous_left(hwaddr cda, uint64_t bsz)\n+{\n+ return bsz - (cda & (bsz - 1));\n+}\n+\n+static inline uint64_t ccw_ida_block_size(uint8_t flags)\n+{\n+ if ((flags & CDS_F_C64) && !(flags & CDS_F_I2K)) {\n+ return 1ULL << 12;\n+ }\n+ return 1ULL << 11;\n+}\n+\n+static inline int ida_read_next_idaw(CcwDataStream *cds, bool ccw_fmt1,\n+ bool idaw_fmt_2)\n+{\n+ union {uint64_t fmt2; uint32_t fmt1; } idaw;\n+ int ret;\n+ hwaddr idaw_addr;\n+\n+ if (idaw_fmt_2) {\n+ idaw_addr = cds->cda_orig + sizeof(idaw.fmt2) * cds->at_idaw;\n+ if (idaw_addr & 0x07 && cds_ccw_addrs_ok(idaw_addr, 0, ccw_fmt1)) {\n+ return -EINVAL; /* channel program check */\n+ }\n+ ret = address_space_rw(&address_space_memory, idaw_addr,\n+ MEMTXATTRS_UNSPECIFIED, (void *) &idaw.fmt2,\n+ sizeof(idaw.fmt2), false);\n+ cds->cda = be64_to_cpu(idaw.fmt2);\n+ } else {\n+ idaw_addr = cds->cda_orig + sizeof(idaw.fmt1) * cds->at_idaw;\n+ if (idaw_addr & 0x03 && cds_ccw_addrs_ok(idaw_addr, 0, ccw_fmt1)) {\n+ return -EINVAL; /* channel program check */\n+ }\n+ ret = address_space_rw(&address_space_memory, idaw_addr,\n+ MEMTXATTRS_UNSPECIFIED, (void *) &idaw.fmt1,\n+ sizeof(idaw.fmt1), false);\n+ cds->cda = be64_to_cpu(idaw.fmt1);\n+ }\n+ ++(cds->at_idaw);\n+ if (ret != MEMTX_OK) {\n+ /* assume inaccessible address */\n+ return -EINVAL; /* channel program check */\n+\n+ }\n+ return 0;\n+}\n+\n+static int ccw_dstream_rw_ida(CcwDataStream *cds, void *buff, int len,\n+ CcwDataStreamOp op)\n+{\n+ uint64_t bsz = ccw_ida_block_size(cds->flags);\n+ int ret = 0;\n+ uint16_t cont_left, iter_len;\n+ const bool idaw_fmt2 = cds->flags & CDS_F_C64;\n+ bool ccw_fmt1 = cds->flags & CDS_F_FMT;\n+\n+ ret = cds_check_len(cds, len);\n+ if (ret <= 0) {\n+ return ret;\n+ }\n+ if (!cds->at_idaw) {\n+ /* read first idaw */\n+ ret = ida_read_next_idaw(cds, ccw_fmt1, idaw_fmt2);\n+ if (ret) {\n+ goto err;\n+ }\n+ cont_left = ida_continuous_left(cds->cda, bsz);\n+ } else {\n+ cont_left = ida_continuous_left(cds->cda, bsz);\n+ if (cont_left == bsz) {\n+ ret = ida_read_next_idaw(cds, ccw_fmt1, idaw_fmt2);\n+ if (ret) {\n+ goto err;\n+ }\n+ if (cds->cda & (bsz - 1)) {\n+ ret = -EINVAL; /* channel program check */\n+ goto err;\n+ }\n+ }\n+ }\n+ do {\n+ iter_len = MIN(len, cont_left);\n+ if (!idaw_fmt2 && (cds->cda + iter_len) >= (1ULL << 31)) {\n+ ret = -EINVAL; /* channel program check */\n+ goto err;\n+ }\n+ if (op != CDS_OP_A) {\n+ ret = address_space_rw(&address_space_memory, cds->cda,\n+ MEMTXATTRS_UNSPECIFIED, buff, iter_len, op);\n+ if (ret != MEMTX_OK) {\n+ /* assume inaccessible address */\n+ ret = -EINVAL; /* channel program check */\n+ goto err;\n+ }\n+ }\n+ cds->at_byte += iter_len;\n+ cds->cda += iter_len;\n+ len -= iter_len;\n+ if (!len) {\n+ break;\n+ }\n+ ret = ida_read_next_idaw(cds, ccw_fmt1, idaw_fmt2);\n+ if (ret) {\n+ goto err;\n+ }\n+ cont_left = bsz;\n+ } while (true);\n+ return ret;\n+err:\n+ cds->flags |= CDS_F_STREAM_BROKEN;\n+ return ret;\n+}\n+\n void ccw_dstream_init(CcwDataStream *cds, CCW1 const *ccw, ORB const *orb)\n {\n /*\n@@ -845,7 +960,7 @@ void ccw_dstream_init(CcwDataStream *cds, CCW1 const *ccw, ORB const *orb)\n if (!(cds->flags & CDS_F_IDA)) {\n cds->op_handler = ccw_dstream_rw_noflags;\n } else {\n- assert(false);\n+ cds->op_handler = ccw_dstream_rw_ida;\n }\n }\n \n","prefixes":["v3","5/5"]}