{"id":815753,"url":"http://patchwork.ozlabs.org/api/patches/815753/?format=json","web_url":"http://patchwork.ozlabs.org/project/netdev/patch/20170919174654.2122-8-f.fainelli@gmail.com/","project":{"id":7,"url":"http://patchwork.ozlabs.org/api/projects/7/?format=json","name":"Linux network development","link_name":"netdev","list_id":"netdev.vger.kernel.org","list_email":"netdev@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170919174654.2122-8-f.fainelli@gmail.com>","list_archive_url":null,"date":"2017-09-19T17:46:49","name":"[net-next,v3,07/12] net: dsa: b53: Define EEE register page","commit_ref":null,"pull_url":null,"state":"accepted","archived":true,"hash":"3ae34bfc89e9e3dc757b13adf176ac2c7a47bbad","submitter":{"id":2800,"url":"http://patchwork.ozlabs.org/api/people/2800/?format=json","name":"Florian Fainelli","email":"f.fainelli@gmail.com"},"delegate":{"id":34,"url":"http://patchwork.ozlabs.org/api/users/34/?format=json","username":"davem","first_name":"David","last_name":"Miller","email":"davem@davemloft.net"},"mbox":"http://patchwork.ozlabs.org/project/netdev/patch/20170919174654.2122-8-f.fainelli@gmail.com/mbox/","series":[{"id":3941,"url":"http://patchwork.ozlabs.org/api/series/3941/?format=json","web_url":"http://patchwork.ozlabs.org/project/netdev/list/?series=3941","date":"2017-09-19T17:46:42","name":"net: dsa: b53/bcm_sf2 cleanups","version":3,"mbox":"http://patchwork.ozlabs.org/series/3941/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/815753/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/815753/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"patchwork-incoming@ozlabs.org","Delivered-To":"patchwork-incoming@ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=netdev-owner@vger.kernel.org;\n\treceiver=)","ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"nYuJKa42\"; dkim-atps=neutral"],"Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xxVgz6CKQz9sPk\n\tfor ;\n\tWed, 20 Sep 2017 03:47:27 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751832AbdISRrX (ORCPT );\n\tTue, 19 Sep 2017 13:47:23 -0400","from mail-wm0-f65.google.com ([74.125.82.65]:33498 \"EHLO\n\tmail-wm0-f65.google.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751815AbdISRrV (ORCPT\n\t); Tue, 19 Sep 2017 13:47:21 -0400","by mail-wm0-f65.google.com with SMTP id m127so325688wmm.0\n\tfor ; Tue, 19 Sep 2017 10:47:20 -0700 (PDT)","from fainelli-desktop.broadcom.com ([192.19.255.250])\n\tby smtp.gmail.com with ESMTPSA id\n\tq19sm11543124wrb.17.2017.09.19.10.47.17\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tTue, 19 Sep 2017 10:47:18 -0700 (PDT)"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=gmail.com; s=20161025;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=C1YxtWeozYSwn7h9C+bKIXNKwfiCD5/6358FWU5MpuY=;\n\tb=nYuJKa4211fDt5Xg1NVuQiS1RtE0z9FS7EB74IN7hV2gbXq7Mbrvz9yax/ke5uBpIw\n\tFVmM0dsRMJWPotHfbL/HVA4A+yyuYgpNEFu8w5ajLBlyQRXba4oEq90xUH3yYQPF4bFo\n\tgWF5SF9QBwoMP2F5AXfOH/N4x1Mr0RLcv9T2Se9w8HtMVpxy8b7a+d0KzlzhnVybLyTx\n\th89fiShjisgsjRvvj0ni8V6oB79/dl49NAdeamya/PQGdGrK6NP51SJgj52jrUR6TLvi\n\t7oJCus+IVdeS4cgI+Issz4St6hUcnT7xxhsPRGewsFhVQh6yGAnWAyjknrG21tV0QbCn\n\t7OzA==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=C1YxtWeozYSwn7h9C+bKIXNKwfiCD5/6358FWU5MpuY=;\n\tb=AZcql+szAiDQrT+PszUOYdhoevzXeKlAqDSLqu0AA7SuO20OR3vU1bYgtMvNvzMQ6z\n\t3LfwjgYnptjUHI/KaibDd9jnsp68OCa+YJh/KLtx/ZBCcExUVakRpV1jzJmklFvHkoI2\n\tdL6Msn6Fx+uP95DqmX+yqU1HQQL5pWzWZ1Q8kY30eSYcQpjjwdCb+iTpo1ywembwgXA6\n\tn/eajfTM38mAp9evd/K7VTjgllT0f8Hf6OxQkocf3PQigSRNbo4tLhkhe/cdZVpp3jVO\n\tJ6Livup6DJVHdxq8Dbgv7gSRNQZO4SFR/31Qz0NtJsI28NL/b1slfiJtHk3r+4k2qNoU\n\taM6Q==","X-Gm-Message-State":"AHPjjUimTSvLCL4lBCgSAHKdjqW/2OHvF7FNGuzYL7WmNpGrK07oVveX\n\tGo0KDou9D8pU8N0mnB8dYE43vvJO","X-Google-Smtp-Source":"AOwi7QDWSX659XfwJOlYFuBVBV9phrjuqqBfHvllzmydQ2Sskj0JWK3USv9uT7lifikZXBwjrXQVzg==","X-Received":"by 10.28.203.4 with SMTP id b4mr927234wmg.17.1505843239742;\n\tTue, 19 Sep 2017 10:47:19 -0700 (PDT)","From":"Florian Fainelli ","To":"netdev@vger.kernel.org","Cc":"davem@davemloft.net, andrew@lunn.ch, vivien.didelot@savoirfairelinux.com,\n\tFlorian Fainelli ","Subject":"[PATCH net-next v3 07/12] net: dsa: b53: Define EEE register page","Date":"Tue, 19 Sep 2017 10:46:49 -0700","Message-Id":"<20170919174654.2122-8-f.fainelli@gmail.com>","X-Mailer":"git-send-email 2.9.3","In-Reply-To":"<20170919174654.2122-1-f.fainelli@gmail.com>","References":"<20170919174654.2122-1-f.fainelli@gmail.com>","Sender":"netdev-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"netdev@vger.kernel.org"},"content":"In preparation for migrating the EEE code from bcm_sf2 to b53, define the full\nEEE register page and offsets within that page.\n\nReviewed-by: Vivien Didelot \nSigned-off-by: Florian Fainelli \n---\n drivers/net/dsa/b53/b53_regs.h | 41 +++++++++++++++++++++++++++++++++++++++++\n 1 file changed, 41 insertions(+)","diff":"diff --git a/drivers/net/dsa/b53/b53_regs.h b/drivers/net/dsa/b53/b53_regs.h\nindex 5e8b8e31fee8..2a9f421680aa 100644\n--- a/drivers/net/dsa/b53/b53_regs.h\n+++ b/drivers/net/dsa/b53/b53_regs.h\n@@ -50,6 +50,9 @@\n /* Jumbo Frame Registers */\n #define B53_JUMBO_PAGE\t\t\t0x40\n \n+/* EEE Control Registers Page */\n+#define B53_EEE_PAGE\t\t\t0x92\n+\n /* CFP Configuration Registers Page */\n #define B53_CFP_PAGE\t\t\t0xa1\n \n@@ -472,6 +475,44 @@\n #define JMS_MAX_SIZE\t\t\t9724\n \n /*************************************************************************\n+ * EEE Configuration Page Registers\n+ *************************************************************************/\n+\n+/* EEE Enable control register (16 bit) */\n+#define B53_EEE_EN_CTRL\t\t\t0x00\n+\n+/* EEE LPI assert status register (16 bit) */\n+#define B53_EEE_LPI_ASSERT_STS\t\t0x02\n+\n+/* EEE LPI indicate status register (16 bit) */\n+#define B53_EEE_LPI_INDICATE\t\t0x4\n+\n+/* EEE Receiving idle symbols status register (16 bit) */\n+#define B53_EEE_RX_IDLE_SYM_STS\t\t0x6\n+\n+/* EEE Pipeline timer register (32 bit) */\n+#define B53_EEE_PIP_TIMER\t\t0xC\n+\n+/* EEE Sleep timer Gig register (32 bit) */\n+#define B53_EEE_SLEEP_TIMER_GIG(i)\t(0x10 + 4 * (i))\n+\n+/* EEE Sleep timer FE register (32 bit) */\n+#define B53_EEE_SLEEP_TIMER_FE(i)\t(0x34 + 4 * (i))\n+\n+/* EEE Minimum LP timer Gig register (32 bit) */\n+#define B53_EEE_MIN_LP_TIMER_GIG(i)\t(0x58 + 4 * (i))\n+\n+/* EEE Minimum LP timer FE register (32 bit) */\n+#define B53_EEE_MIN_LP_TIMER_FE(i)\t(0x7c + 4 * (i))\n+\n+/* EEE Wake timer Gig register (16 bit) */\n+#define B53_EEE_WAKE_TIMER_GIG(i)\t(0xa0 + 2 * (i))\n+\n+/* EEE Wake timer FE register (16 bit) */\n+#define B53_EEE_WAKE_TIMER_FE(i)\t(0xb2 + 2 * (i))\n+\n+\n+/*************************************************************************\n * CFP Configuration Page Registers\n *************************************************************************/\n \n","prefixes":["net-next","v3","07/12"]}