{"id":815644,"url":"http://patchwork.ozlabs.org/api/patches/815644/?format=json","web_url":"http://patchwork.ozlabs.org/project/netdev/patch/20170919161716.92680-4-salil.mehta@huawei.com/","project":{"id":7,"url":"http://patchwork.ozlabs.org/api/projects/7/?format=json","name":"Linux network development","link_name":"netdev","list_id":"netdev.vger.kernel.org","list_email":"netdev@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170919161716.92680-4-salil.mehta@huawei.com>","list_archive_url":null,"date":"2017-09-19T16:17:12","name":"[V2,net,3/7] net: hns3: Fixes ring-to-vector map-and-unmap command","commit_ref":null,"pull_url":null,"state":"accepted","archived":true,"hash":"a6d522ae4f75ce5916b4f6132c011aa96f8af0d1","submitter":{"id":67454,"url":"http://patchwork.ozlabs.org/api/people/67454/?format=json","name":"Salil Mehta","email":"salil.mehta@huawei.com"},"delegate":{"id":34,"url":"http://patchwork.ozlabs.org/api/users/34/?format=json","username":"davem","first_name":"David","last_name":"Miller","email":"davem@davemloft.net"},"mbox":"http://patchwork.ozlabs.org/project/netdev/patch/20170919161716.92680-4-salil.mehta@huawei.com/mbox/","series":[{"id":3921,"url":"http://patchwork.ozlabs.org/api/series/3921/?format=json","web_url":"http://patchwork.ozlabs.org/project/netdev/list/?series=3921","date":"2017-09-19T16:17:16","name":"Bug fixes for the HNS3 Ethernet Driver for Hip08 SoC","version":2,"mbox":"http://patchwork.ozlabs.org/series/3921/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/815644/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/815644/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"patchwork-incoming@ozlabs.org","Delivered-To":"patchwork-incoming@ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=netdev-owner@vger.kernel.org;\n\treceiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xxSkl3wCfz9ryT\n\tfor ;\n\tWed, 20 Sep 2017 02:19:43 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751823AbdISQSO (ORCPT );\n\tTue, 19 Sep 2017 12:18:14 -0400","from szxga05-in.huawei.com ([45.249.212.191]:6517 \"EHLO\n\tszxga05-in.huawei.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1751834AbdISQSK (ORCPT\n\t); Tue, 19 Sep 2017 12:18:10 -0400","from 172.30.72.58 (EHLO DGGEMS414-HUB.china.huawei.com)\n\t([172.30.72.58])\n\tby dggrg05-dlp.huawei.com (MOS 4.4.6-GA FastPath queued)\n\twith ESMTP id DHQ42779; Wed, 20 Sep 2017 00:18:07 +0800 (CST)","from S00293818-DELL1.china.huawei.com (10.203.181.154) by\n\tDGGEMS414-HUB.china.huawei.com (10.3.19.214) with Microsoft SMTP\n\tServer id 14.3.301.0; Wed, 20 Sep 2017 00:17:59 +0800"],"From":"Salil Mehta ","To":"","CC":", ,\n\t, ,\n\t, ,\n\t, ,\n\tMingguang Qu ","Subject":"[PATCH V2 net 3/7] net: hns3: Fixes ring-to-vector map-and-unmap\n\tcommand","Date":"Tue, 19 Sep 2017 17:17:12 +0100","Message-ID":"<20170919161716.92680-4-salil.mehta@huawei.com>","X-Mailer":"git-send-email 2.8.3","In-Reply-To":"<20170919161716.92680-1-salil.mehta@huawei.com>","References":"<20170919161716.92680-1-salil.mehta@huawei.com>","MIME-Version":"1.0","Content-Type":"text/plain","X-Originating-IP":"[10.203.181.154]","X-CFilter-Loop":"Reflected","X-Mirapoint-Virus-RAPID-Raw":"score=unknown(0),\n\trefid=str=0001.0A020205.59C14340.000A, ss=1, re=0.000, recu=0.000,\n\treip=0.000, cl=1, cld=1, fgs=0, ip=0.0.0.0,\n\tso=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32","X-Mirapoint-Loop-Id":"cc1faf1a8e085ef5ecd50cc19cf54816","Sender":"netdev-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"netdev@vger.kernel.org"},"content":"From: Lipeng \n\nThis patch fixes the vector-to-ring map and unmap command and adds\nINT_GL(for, Gap Limiting Interrupts) and VF id to it as required\nby the hardware interface.\n\nFixes: 6427264ef330 (\"net: hns3: Add HNS3 Acceleration Engine &\nCompatibility Layer Support\")\nSigned-off-by: Lipeng \nSigned-off-by: Mingguang Qu \nSigned-off-by: Salil Mehta \n---\n drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h | 8 ++++++--\n drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c | 8 ++++++++\n 2 files changed, 14 insertions(+), 2 deletions(-)","diff":"diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h\nindex 91ae013..c2b613b 100644\n--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h\n+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h\n@@ -238,7 +238,7 @@ struct hclge_tqp_map {\n \tu8 rsv[18];\n };\n \n-#define HCLGE_VECTOR_ELEMENTS_PER_CMD\t11\n+#define HCLGE_VECTOR_ELEMENTS_PER_CMD\t10\n \n enum hclge_int_type {\n \tHCLGE_INT_TX,\n@@ -252,8 +252,12 @@ struct hclge_ctrl_vector_chain {\n #define HCLGE_INT_TYPE_S\t0\n #define HCLGE_INT_TYPE_M\t0x3\n #define HCLGE_TQP_ID_S\t\t2\n-#define HCLGE_TQP_ID_M\t\t(0x3fff << HCLGE_TQP_ID_S)\n+#define HCLGE_TQP_ID_M\t\t(0x7ff << HCLGE_TQP_ID_S)\n+#define HCLGE_INT_GL_IDX_S\t13\n+#define HCLGE_INT_GL_IDX_M\t(0x3 << HCLGE_INT_GL_IDX_S)\n \t__le16 tqp_type_and_id[HCLGE_VECTOR_ELEMENTS_PER_CMD];\n+\tu8 vfid;\n+\tu8 rsv;\n };\n \n #define HCLGE_TC_NUM\t\t8\ndiff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c\nindex e324bc6..eafd9c6 100644\n--- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c\n+++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c\n@@ -2680,7 +2680,11 @@ int hclge_map_vport_ring_to_vector(struct hclge_vport *vport, int vector_id,\n \t\t\t hnae_get_bit(node->flag, HNAE3_RING_TYPE_B));\n \t\thnae_set_field(req->tqp_type_and_id[i], HCLGE_TQP_ID_M,\n \t\t\t HCLGE_TQP_ID_S,\tnode->tqp_index);\n+\t\thnae_set_field(req->tqp_type_and_id[i], HCLGE_INT_GL_IDX_M,\n+\t\t\t HCLGE_INT_GL_IDX_S,\n+\t\t\t hnae_get_bit(node->flag, HNAE3_RING_TYPE_B));\n \t\treq->tqp_type_and_id[i] = cpu_to_le16(req->tqp_type_and_id[i]);\n+\t\treq->vfid = vport->vport_id;\n \n \t\tif (++i >= HCLGE_VECTOR_ELEMENTS_PER_CMD) {\n \t\t\treq->int_cause_num = HCLGE_VECTOR_ELEMENTS_PER_CMD;\n@@ -2764,8 +2768,12 @@ static int hclge_unmap_ring_from_vector(\n \t\t\t hnae_get_bit(node->flag, HNAE3_RING_TYPE_B));\n \t\thnae_set_field(req->tqp_type_and_id[i], HCLGE_TQP_ID_M,\n \t\t\t HCLGE_TQP_ID_S,\tnode->tqp_index);\n+\t\thnae_set_field(req->tqp_type_and_id[i], HCLGE_INT_GL_IDX_M,\n+\t\t\t HCLGE_INT_GL_IDX_S,\n+\t\t\t hnae_get_bit(node->flag, HNAE3_RING_TYPE_B));\n \n \t\treq->tqp_type_and_id[i] = cpu_to_le16(req->tqp_type_and_id[i]);\n+\t\treq->vfid = vport->vport_id;\n \n \t\tif (++i >= HCLGE_VECTOR_ELEMENTS_PER_CMD) {\n \t\t\treq->int_cause_num = HCLGE_VECTOR_ELEMENTS_PER_CMD;\n","prefixes":["V2","net","3/7"]}