{"id":815438,"url":"http://patchwork.ozlabs.org/api/patches/815438/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-mtd/patch/20170919105605.18533-2-vigneshr@ti.com/","project":{"id":3,"url":"http://patchwork.ozlabs.org/api/projects/3/?format=json","name":"Linux MTD development","link_name":"linux-mtd","list_id":"linux-mtd.lists.infradead.org","list_email":"linux-mtd@lists.infradead.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170919105605.18533-2-vigneshr@ti.com>","list_archive_url":null,"date":"2017-09-19T10:56:01","name":"[RESEND,v2,1/5] mtd: spi-nor: cadence-quadspi: Add TI 66AK2G SoC specific compatible","commit_ref":null,"pull_url":null,"state":"superseded","archived":false,"hash":"e3ecfb01b85f55c37fef1ebd66f9a2612f5233c8","submitter":{"id":65039,"url":"http://patchwork.ozlabs.org/api/people/65039/?format=json","name":"Raghavendra, Vignesh","email":"vigneshr@ti.com"},"delegate":{"id":63396,"url":"http://patchwork.ozlabs.org/api/users/63396/?format=json","username":"cpitchen","first_name":"Cyrille","last_name":"Pitchen","email":"cyrille.pitchen@atmel.com"},"mbox":"http://patchwork.ozlabs.org/project/linux-mtd/patch/20170919105605.18533-2-vigneshr@ti.com/mbox/","series":[{"id":3841,"url":"http://patchwork.ozlabs.org/api/series/3841/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-mtd/list/?series=3841","date":"2017-09-19T10:56:01","name":"K2G: Add QSPI support","version":2,"mbox":"http://patchwork.ozlabs.org/series/3841/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/815438/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/815438/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org; 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a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:\n\tMessage-ID:Date:Subject:To:From:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=Xhjp0jXnCTFfRe63yc+yMugzL+yunCGxXw9cqPwynds=;\n\tb=tIf7rTyhwd9q29\n\tFfJM1T/33yoZwuP/9gmDG4LVoVyZtgQMwU9POist6ZmiNE6TNf7JUg4raXni54aAkGiJvjTaTsO81\n\te/QbqzlpIIvUj8CkWciBrIq+cQ/CvKNtp2iIBlFHetNIsdbTEZDyh+OqL/69OAPrHop2+3CfFe1X2\n\tGwPlmxjS+htfpvO6/oMx8IpvYBg38OdIwI4d1ewyzVW8HEIFAhtS/VgrBs3wtrU4e2e5ESyW3bmkr\n\tuQhXuwCqpM9Zkb6mALvgtEpgODyvBmM4L898J29rrzc7eBevrTg1BYLsmNhj1jFOp0IyBvBvd+rXY\n\tmgNgyRGeG6sAPAUwxN5w==;","v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com;\n\ts=ti-com-17Q1; t=1505818574;\n\tbh=k8p/LqUqVDVFSLOJH+ZUps60729d8JHs9HdJk1vHZ9c=;\n\th=From:To:CC:Subject:Date:In-Reply-To:References;\n\tb=mvSo1kHi4A0iKrVp/Ee4k962o/hZCof88+yYCvxj5KbmkFZyF5v4KezafXN6ZoEWN\n\tP9Go4OIwCkNYRYFilArdWJfMtD4nYJm/Z/Oqc54AVZtRCcF9q0Y6rSbp19mhv25m/P\n\tbI/a1aYS1jUh/024TFULx+/c93BmGizKAzHwiNF8="],"From":"Vignesh R ","To":"Marek Vasut , Cyrille Pitchen\n\t","Subject":"[RESEND PATCH v2 1/5] mtd: spi-nor: cadence-quadspi: Add TI 66AK2G\n\tSoC specific compatible","Date":"Tue, 19 Sep 2017 16:26:01 +0530","Message-ID":"<20170919105605.18533-2-vigneshr@ti.com>","X-Mailer":"git-send-email 2.14.1","In-Reply-To":"<20170919105605.18533-1-vigneshr@ti.com>","References":"<20170919105605.18533-1-vigneshr@ti.com>","MIME-Version":"1.0","X-EXCLAIMER-MD-CONFIG":"e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170919_035708_458281_1068B123 ","X-CRM114-Status":"UNSURE ( 7.49 )","X-CRM114-Notice":"Please train this message.","X-Spam-Score":"-2.0 (--)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-2.0 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/,\n\tno trust [198.47.27.77 listed in list.dnswl.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-0.0 RP_MATCHES_RCVD Envelope sender domain matches handover relay\n\tdomain\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]\n\t-0.1 DKIM_VALID Message has at least one valid DKIM or DK signature\n\t0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n\tnot necessarily valid\n\t-0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n\tauthor's domain","X-BeenThere":"linux-mtd@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"Linux MTD discussion mailing list ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Boris Brezillon ,\n\tVignesh R , devicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org, Rob Herring ,\n\tlinux-mtd@lists.infradead.org,\n\tBrian Norris , \n\tDavid Woodhouse ,\n\tlinux-arm-kernel ","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-mtd\" ","Errors-To":"linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org"},"content":"Update binding documentation to add a new compatible for TI 66AK2G SoC,\nto handle TI SoC specific quirks in the driver.\n\nSigned-off-by: Vignesh R \nAcked-by: Rob Herring \n---\n Documentation/devicetree/bindings/mtd/cadence-quadspi.txt | 4 +++-\n 1 file changed, 3 insertions(+), 1 deletion(-)","diff":"diff --git a/Documentation/devicetree/bindings/mtd/cadence-quadspi.txt b/Documentation/devicetree/bindings/mtd/cadence-quadspi.txt\nindex f248056da24c..7dbe3bd9ac56 100644\n--- a/Documentation/devicetree/bindings/mtd/cadence-quadspi.txt\n+++ b/Documentation/devicetree/bindings/mtd/cadence-quadspi.txt\n@@ -1,7 +1,9 @@\n * Cadence Quad SPI controller\n \n Required properties:\n-- compatible : Should be \"cdns,qspi-nor\".\n+- compatible : should be one of the following:\n+\tGeneric default - \"cdns,qspi-nor\".\n+\tFor TI 66AK2G SoC - \"ti,k2g-qspi\", \"cdns,qspi-nor\".\n - reg : Contains two entries, each of which is a tuple consisting of a\n \tphysical address and length. The first entry is the address and\n \tlength of the controller register set. The second entry is the\n","prefixes":["RESEND","v2","1/5"]}