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nxp.com; dkim=none (message not signed)\n\theader.d=none;nxp.com; dmarc=fail action=none header.from=nxp.com;"],"Received-SPF":"Fail (protection.outlook.com: domain of nxp.com does not\n\tdesignate 192.88.168.50 as permitted sender)\n\treceiver=protection.outlook.com; \n\tclient-ip=192.88.168.50; helo=tx30smr01.am.freescale.net;","From":"Zhiqiang Hou ","To":", ,\n\t, , \n\t, ,\n\t, , , \n\t, , , \n\t","Subject":"[PATCH 4/5] arm64: dts: ls1012a: Add PCIe controller DT node","Date":"Tue, 19 Sep 2017 17:26:57 +0800","Message-ID":"<20170919092658.22482-5-Zhiqiang.Hou@nxp.com>","X-Mailer":"git-send-email 2.14.1","In-Reply-To":"<20170919092658.22482-1-Zhiqiang.Hou@nxp.com>","References":"<20170919092658.22482-1-Zhiqiang.Hou@nxp.com>","X-EOPAttributedMessage":"0","X-Matching-Connectors":"131502878820528731;\n\t(91ab9b29-cfa4-454e-5278-08d120cd25b8); ()","X-Forefront-Antispam-Report":"CIP:192.88.168.50; IPV:NLI; CTRY:US; EFV:NLI;\n\tSFV:NSPM;\n\tSFS:(10009020)(6009001)(336005)(39860400002)(376002)(39380400002)(346002)(2980300002)(1110001)(1109001)(339900001)(199003)(189002)(97736004)(2950100002)(4326008)(50466002)(81166006)(53936002)(72206003)(1076002)(498600001)(356003)(8936002)(16586007)(105606002)(50986999)(48376002)(305945005)(85426001)(50226002)(8656003)(2201001)(2906002)(86362001)(5003940100001)(81156014)(106466001)(77096006)(316002)(104016004)(76176999)(6636002)(5660300001)(7416002)(6666003)(47776003)(189998001)(36756003)(8676002)(110136005)(68736007)(921003)(1121003)(2101003)(83996005);\n\tDIR:OUT; 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","X-Forefront-PRVS":"04359FAD81","SpamDiagnosticOutput":"1:99","SpamDiagnosticMetadata":"NSPM","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"19 Sep 2017 09:44:41.8812\n\t(UTC)","X-MS-Exchange-CrossTenant-Id":"5afe0b00-7697-4969-b663-5eab37d5f47e","X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp":"TenantId=5afe0b00-7697-4969-b663-5eab37d5f47e;\n\tIp=[192.88.168.50]; \n\tHelo=[tx30smr01.am.freescale.net]","X-MS-Exchange-CrossTenant-FromEntityHeader":"HybridOnPrem","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"CO2PR03MB2360","X-BeenThere":"linuxppc-dev@lists.ozlabs.org","X-Mailman-Version":"2.1.24","Precedence":"list","List-Id":"Linux on PowerPC Developers Mail List\n\t","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Hou Zhiqiang ","Errors-To":"linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org","Sender":"\"Linuxppc-dev\"\n\t"},"content":"From: Hou Zhiqiang \n\nAdd PCIe controller node for ls1012a platform.\n\nSigned-off-by: Hou Zhiqiang \n---\n arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 24 ++++++++++++++++++++++++\n 1 file changed, 24 insertions(+)","diff":"diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi\nindex a7698ac7264b..140570d45ff3 100644\n--- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi\n+++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi\n@@ -478,5 +478,29 @@\n \t\t\tmsi-controller;\n \t\t\tinterrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>;\n \t\t};\n+\n+\t\tpcie@3400000 {\n+\t\t\tcompatible = \"fsl,ls1012a-pcie\", \"snps,dw-pcie\";\n+\t\t\treg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */\n+\t\t\t 0x40 0x00000000 0x0 0x00002000>; /* configuration space */\n+\t\t\treg-names = \"regs\", \"config\";\n+\t\t\tinterrupts = <0 118 0x4>, /* controller interrupt */\n+\t\t\t\t <0 117 0x4>; /* PME interrupt */\n+\t\t\tinterrupt-names = \"aer\", \"pme\";\n+\t\t\t#address-cells = <3>;\n+\t\t\t#size-cells = <2>;\n+\t\t\tdevice_type = \"pci\";\n+\t\t\tnum-lanes = <4>;\n+\t\t\tbus-range = <0x0 0xff>;\n+\t\t\tranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */\n+\t\t\t\t 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */\n+\t\t\tmsi-parent = <&msi>;\n+\t\t\t#interrupt-cells = <1>;\n+\t\t\tinterrupt-map-mask = <0 0 0 7>;\n+\t\t\tinterrupt-map = <0000 0 0 1 &gic 0 110 IRQ_TYPE_LEVEL_HIGH>,\n+\t\t\t\t\t<0000 0 0 2 &gic 0 111 IRQ_TYPE_LEVEL_HIGH>,\n+\t\t\t\t\t<0000 0 0 3 &gic 0 112 IRQ_TYPE_LEVEL_HIGH>,\n+\t\t\t\t\t<0000 0 0 4 &gic 0 113 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t};\n \t};\n };\n","prefixes":["4/5"]}