{"id":815341,"url":"http://patchwork.ozlabs.org/api/patches/815341/?format=json","web_url":"http://patchwork.ozlabs.org/project/netdev/patch/20170919080020.5870-10-jiri@resnulli.us/","project":{"id":7,"url":"http://patchwork.ozlabs.org/api/projects/7/?format=json","name":"Linux network development","link_name":"netdev","list_id":"netdev.vger.kernel.org","list_email":"netdev@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170919080020.5870-10-jiri@resnulli.us>","list_archive_url":null,"date":"2017-09-19T08:00:16","name":"[net-next,09/13] mlxsw: reg: Add the Router Multicast Forwarding Table Version 2 register","commit_ref":null,"pull_url":null,"state":"accepted","archived":true,"hash":"8b7c43a42e83733ffdf160ebee89d98f882d14eb","submitter":{"id":15321,"url":"http://patchwork.ozlabs.org/api/people/15321/?format=json","name":"Jiri Pirko","email":"jiri@resnulli.us"},"delegate":{"id":34,"url":"http://patchwork.ozlabs.org/api/users/34/?format=json","username":"davem","first_name":"David","last_name":"Miller","email":"davem@davemloft.net"},"mbox":"http://patchwork.ozlabs.org/project/netdev/patch/20170919080020.5870-10-jiri@resnulli.us/mbox/","series":[{"id":3798,"url":"http://patchwork.ozlabs.org/api/series/3798/?format=json","web_url":"http://patchwork.ozlabs.org/project/netdev/list/?series=3798","date":"2017-09-19T08:00:07","name":"mlxsw: Prepare for multicast router offload","version":1,"mbox":"http://patchwork.ozlabs.org/series/3798/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/815341/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/815341/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"patchwork-incoming@ozlabs.org","Delivered-To":"patchwork-incoming@ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; 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\n\tTue, 19 Sep 2017 01:00:30 -0700 (PDT)","From":"Jiri Pirko ","To":"netdev@vger.kernel.org","Cc":"davem@davemloft.net, yotamg@mellanox.com, idosch@mellanox.com,\n\tmlxsw@mellanox.com","Subject":"[patch net-next 09/13] mlxsw: reg: Add the Router Multicast\n\tForwarding Table Version 2 register","Date":"Tue, 19 Sep 2017 10:00:16 +0200","Message-Id":"<20170919080020.5870-10-jiri@resnulli.us>","X-Mailer":"git-send-email 2.9.5","In-Reply-To":"<20170919080020.5870-1-jiri@resnulli.us>","References":"<20170919080020.5870-1-jiri@resnulli.us>","Sender":"netdev-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"netdev@vger.kernel.org"},"content":"From: Yotam Gigi \n\nThe RMFT-V2 register is used to configure and query the multicast table and\nwill be used by the multicast router offloading logic.\n\nSigned-off-by: Yotam Gigi \nReviewed-by: Ido Schimmel \nSigned-off-by: Jiri Pirko \n---\n drivers/net/ethernet/mellanox/mlxsw/reg.h | 142 ++++++++++++++++++++++++++++++\n 1 file changed, 142 insertions(+)","diff":"diff --git a/drivers/net/ethernet/mellanox/mlxsw/reg.h b/drivers/net/ethernet/mellanox/mlxsw/reg.h\nindex 1778d7f..046525e 100644\n--- a/drivers/net/ethernet/mellanox/mlxsw/reg.h\n+++ b/drivers/net/ethernet/mellanox/mlxsw/reg.h\n@@ -5728,6 +5728,147 @@ static inline void mlxsw_reg_rigr2_erif_entry_pack(char *payload, int index,\n \tmlxsw_reg_rigr2_erif_entry_erif_set(payload, index, erif);\n }\n \n+/* RMFT-V2 - Router Multicast Forwarding Table Version 2 Register\n+ * --------------------------------------------------------------\n+ * The RMFT_V2 register is used to configure and query the multicast table.\n+ */\n+#define MLXSW_REG_RMFT2_ID 0x8027\n+#define MLXSW_REG_RMFT2_LEN 0x174\n+\n+MLXSW_REG_DEFINE(rmft2, MLXSW_REG_RMFT2_ID, MLXSW_REG_RMFT2_LEN);\n+\n+/* reg_rmft2_v\n+ * Valid\n+ * Access: RW\n+ */\n+MLXSW_ITEM32(reg, rmft2, v, 0x00, 31, 1);\n+\n+enum mlxsw_reg_rmft2_type {\n+\tMLXSW_REG_RMFT2_TYPE_IPV4,\n+\tMLXSW_REG_RMFT2_TYPE_IPV6\n+};\n+\n+/* reg_rmft2_type\n+ * Access: Index\n+ */\n+MLXSW_ITEM32(reg, rmft2, type, 0x00, 28, 2);\n+\n+enum mlxsw_sp_reg_rmft2_op {\n+\t/* For Write:\n+\t * Write operation. Used to write a new entry to the table. All RW\n+\t * fields are relevant for new entry. Activity bit is set for new\n+\t * entries - Note write with v (Valid) 0 will delete the entry.\n+\t * For Query:\n+\t * Read operation\n+\t */\n+\tMLXSW_REG_RMFT2_OP_READ_WRITE,\n+};\n+\n+/* reg_rmft2_op\n+ * Operation.\n+ * Access: OP\n+ */\n+MLXSW_ITEM32(reg, rmft2, op, 0x00, 20, 2);\n+\n+/* reg_rmft2_a\n+ * Activity. Set for new entries. Set if a packet lookup has hit on the specific\n+ * entry.\n+ * Access: RO\n+ */\n+MLXSW_ITEM32(reg, rmft2, a, 0x00, 16, 1);\n+\n+/* reg_rmft2_offset\n+ * Offset within the multicast forwarding table to write to.\n+ * Access: Index\n+ */\n+MLXSW_ITEM32(reg, rmft2, offset, 0x00, 0, 16);\n+\n+/* reg_rmft2_virtual_router\n+ * Virtual Router ID. Range from 0..cap_max_virtual_routers-1\n+ * Access: RW\n+ */\n+MLXSW_ITEM32(reg, rmft2, virtual_router, 0x04, 0, 16);\n+\n+enum mlxsw_reg_rmft2_irif_mask {\n+\tMLXSW_REG_RMFT2_IRIF_MASK_IGNORE,\n+\tMLXSW_REG_RMFT2_IRIF_MASK_COMPARE\n+};\n+\n+/* reg_rmft2_irif_mask\n+ * Ingress RIF mask.\n+ * Access: RW\n+ */\n+MLXSW_ITEM32(reg, rmft2, irif_mask, 0x08, 24, 1);\n+\n+/* reg_rmft2_irif\n+ * Ingress RIF index.\n+ * Access: RW\n+ */\n+MLXSW_ITEM32(reg, rmft2, irif, 0x08, 0, 16);\n+\n+/* reg_rmft2_dip4\n+ * Destination IPv4 address\n+ * Access: RW\n+ */\n+MLXSW_ITEM32(reg, rmft2, dip4, 0x1C, 0, 32);\n+\n+/* reg_rmft2_dip4_mask\n+ * A bit that is set directs the TCAM to compare the corresponding bit in key. A\n+ * bit that is clear directs the TCAM to ignore the corresponding bit in key.\n+ * Access: RW\n+ */\n+MLXSW_ITEM32(reg, rmft2, dip4_mask, 0x2C, 0, 32);\n+\n+/* reg_rmft2_sip4\n+ * Source IPv4 address\n+ * Access: RW\n+ */\n+MLXSW_ITEM32(reg, rmft2, sip4, 0x3C, 0, 32);\n+\n+/* reg_rmft2_sip4_mask\n+ * A bit that is set directs the TCAM to compare the corresponding bit in key. A\n+ * bit that is clear directs the TCAM to ignore the corresponding bit in key.\n+ * Access: RW\n+ */\n+MLXSW_ITEM32(reg, rmft2, sip4_mask, 0x4C, 0, 32);\n+\n+/* reg_rmft2_flexible_action_set\n+ * ACL action set. The only supported action types in this field and in any\n+ * action-set pointed from here are as follows:\n+ * 00h: ACTION_NULL\n+ * 01h: ACTION_MAC_TTL, only TTL configuration is supported.\n+ * 03h: ACTION_TRAP\n+ * 06h: ACTION_QOS\n+ * 08h: ACTION_POLICING_MONITORING\n+ * 10h: ACTION_ROUTER_MC\n+ * Access: RW\n+ */\n+MLXSW_ITEM_BUF(reg, rmft2, flexible_action_set, 0x80,\n+\t MLXSW_REG_FLEX_ACTION_SET_LEN);\n+\n+static inline void\n+mlxsw_reg_rmft2_ipv4_pack(char *payload, bool v, u16 offset, u16 virtual_router,\n+\t\t\t enum mlxsw_reg_rmft2_irif_mask irif_mask, u16 irif,\n+\t\t\t u32 dip4, u32 dip4_mask, u32 sip4, u32 sip4_mask,\n+\t\t\t const char *flexible_action_set)\n+{\n+\tMLXSW_REG_ZERO(rmft2, payload);\n+\tmlxsw_reg_rmft2_v_set(payload, v);\n+\tmlxsw_reg_rmft2_type_set(payload, MLXSW_REG_RMFT2_TYPE_IPV4);\n+\tmlxsw_reg_rmft2_op_set(payload, MLXSW_REG_RMFT2_OP_READ_WRITE);\n+\tmlxsw_reg_rmft2_offset_set(payload, offset);\n+\tmlxsw_reg_rmft2_virtual_router_set(payload, virtual_router);\n+\tmlxsw_reg_rmft2_irif_mask_set(payload, irif_mask);\n+\tmlxsw_reg_rmft2_irif_set(payload, irif);\n+\tmlxsw_reg_rmft2_dip4_set(payload, dip4);\n+\tmlxsw_reg_rmft2_dip4_mask_set(payload, dip4_mask);\n+\tmlxsw_reg_rmft2_sip4_set(payload, sip4);\n+\tmlxsw_reg_rmft2_sip4_mask_set(payload, sip4_mask);\n+\tif (flexible_action_set)\n+\t\tmlxsw_reg_rmft2_flexible_action_set_memcpy_to(payload,\n+\t\t\t\t\t\t\t flexible_action_set);\n+}\n+\n /* MFCR - Management Fan Control Register\n * --------------------------------------\n * This register controls the settings of the Fan Speed PWM mechanism.\n@@ -7000,6 +7141,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {\n \tMLXSW_REG(raleu),\n \tMLXSW_REG(rauhtd),\n \tMLXSW_REG(rigr2),\n+\tMLXSW_REG(rmft2),\n \tMLXSW_REG(mfcr),\n \tMLXSW_REG(mfsc),\n \tMLXSW_REG(mfsm),\n","prefixes":["net-next","09/13"]}