{"id":815330,"url":"http://patchwork.ozlabs.org/api/patches/815330/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/1505807208-9063-13-git-send-email-eric.auger@redhat.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1505807208-9063-13-git-send-email-eric.auger@redhat.com>","list_archive_url":null,"date":"2017-09-19T07:46:44","name":"[RFC,v4,12/16] hw/arm/virt: Add virtio-iommu to the virt board","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"0958603fc764b8a052cd7d11eeed8e64d9b3c8c0","submitter":{"id":69187,"url":"http://patchwork.ozlabs.org/api/people/69187/?format=json","name":"Eric Auger","email":"eric.auger@redhat.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/1505807208-9063-13-git-send-email-eric.auger@redhat.com/mbox/","series":[{"id":3796,"url":"http://patchwork.ozlabs.org/api/series/3796/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=3796","date":"2017-09-19T07:46:32","name":"VIRTIO-IOMMU device","version":4,"mbox":"http://patchwork.ozlabs.org/series/3796/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/815330/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/815330/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","ext-mx07.extmail.prod.ext.phx2.redhat.com;\n\tdmarc=none (p=none dis=none) header.from=redhat.com","ext-mx07.extmail.prod.ext.phx2.redhat.com;\n\tspf=fail smtp.mailfrom=eric.auger@redhat.com"],"Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xxFc14RCMz9s7M\n\tfor ;\n\tTue, 19 Sep 2017 17:58:09 +1000 (AEST)","from localhost ([::1]:40643 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t)\n\tid 1duDPz-0007ZL-Mh\n\tfor incoming@patchwork.ozlabs.org; Tue, 19 Sep 2017 03:58:07 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:48215)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from ) id 1duDI8-0001Ip-Ce\n\tfor qemu-devel@nongnu.org; Tue, 19 Sep 2017 03:50:01 -0400","from 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peter.maydell@linaro.org,\n\talex.williamson@redhat.com, mst@redhat.com, qemu-arm@nongnu.org,\n\tqemu-devel@nongnu.org, jean-philippe.brucker@arm.com","Date":"Tue, 19 Sep 2017 09:46:44 +0200","Message-Id":"<1505807208-9063-13-git-send-email-eric.auger@redhat.com>","In-Reply-To":"<1505807208-9063-1-git-send-email-eric.auger@redhat.com>","References":"<1505807208-9063-1-git-send-email-eric.auger@redhat.com>","X-Scanned-By":"MIMEDefang 2.79 on 10.5.11.11","X-Greylist":"Sender IP whitelisted, not delayed by milter-greylist-4.5.16\n\t(mx1.redhat.com [10.5.110.31]);\n\tTue, 19 Sep 2017 07:49:50 +0000 (UTC)","X-detected-operating-system":"by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic]\n\t[fuzzy]","X-Received-From":"209.132.183.28","Subject":"[Qemu-devel] [RFC v4 12/16] hw/arm/virt: Add virtio-iommu to the\n\tvirt board","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"wei@redhat.com, kevin.tian@intel.com, marc.zyngier@arm.com,\n\ttn@semihalf.com, \n\twill.deacon@arm.com, drjones@redhat.com, peterx@redhat.com,\n\tlinuc.decode@gmail.com, bharat.bhushan@nxp.com,\n\tchristoffer.dall@linaro.org","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"},"content":"The specific virtio-mmio node is inconditionally added on\nmachine init while the binding between this latter and the\nPCIe host bridge is done on machine init done notifier, only\nif -device virtio-iommu-device was added to the qemu command\nline.\n\nSigned-off-by: Eric Auger \n\n---\n---\n hw/arm/virt.c | 92 +++++++++++++++++++++++++++++++++++++++++++++++----\n include/hw/arm/virt.h | 4 +++\n 2 files changed, 89 insertions(+), 7 deletions(-)","diff":"diff --git a/hw/arm/virt.c b/hw/arm/virt.c\nindex 9737a5f..f057d7a 100644\n--- a/hw/arm/virt.c\n+++ b/hw/arm/virt.c\n@@ -52,6 +52,7 @@\n #include \"hw/arm/fdt.h\"\n #include \"hw/intc/arm_gic.h\"\n #include \"hw/intc/arm_gicv3_common.h\"\n+#include \"hw/virtio/virtio-iommu.h\"\n #include \"kvm_arm.h\"\n #include \"hw/smbios/smbios.h\"\n #include \"qapi/visitor.h\"\n@@ -139,6 +140,7 @@ static const MemMapEntry a15memmap[] = {\n [VIRT_FW_CFG] = { 0x09020000, 0x00000018 },\n [VIRT_GPIO] = { 0x09030000, 0x00001000 },\n [VIRT_SECURE_UART] = { 0x09040000, 0x00001000 },\n+ [VIRT_IOMMU] = { 0x09050000, 0x00000200 },\n [VIRT_MMIO] = { 0x0a000000, 0x00000200 },\n /* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */\n [VIRT_PLATFORM_BUS] = { 0x0c000000, 0x02000000 },\n@@ -159,6 +161,7 @@ static const int a15irqmap[] = {\n [VIRT_SECURE_UART] = 8,\n [VIRT_MMIO] = 16, /* ...to 16 + NUM_VIRTIO_TRANSPORTS - 1 */\n [VIRT_GIC_V2M] = 48, /* ...to 48 + NUM_GICV2M_SPIS - 1 */\n+ [VIRT_IOMMU] = 74,\n [VIRT_PLATFORM_BUS] = 112, /* ...to 112 + PLATFORM_BUS_NUM_IRQS -1 */\n };\n \n@@ -999,7 +1002,81 @@ static void create_pcie_irq_map(const VirtMachineState *vms,\n 0x7 /* PCI irq */);\n }\n \n-static void create_pcie(const VirtMachineState *vms, qemu_irq *pic)\n+static int bind_virtio_iommu_device(Object *obj, void *opaque)\n+{\n+ VirtMachineState *vms = (VirtMachineState *)opaque;\n+ struct arm_boot_info *info = &vms->bootinfo;\n+ int dtb_size;\n+ void *fdt = info->get_dtb(info, &dtb_size);\n+ Object *dev;\n+\n+ dev = object_dynamic_cast(obj, TYPE_VIRTIO_IOMMU);\n+\n+ if (!dev) {\n+ /* Container, traverse it for children */\n+ return object_child_foreach(obj, bind_virtio_iommu_device, opaque);\n+ }\n+\n+ qemu_fdt_setprop_cells(fdt, vms->pcie_host_nodename, \"iommu-map\",\n+ 0x0, vms->iommu_phandle, 0x0, 0x10000);\n+\n+ return true;\n+}\n+\n+static\n+void virtio_iommu_notifier(Notifier *notifier, void *data)\n+{\n+ VirtMachineState *vms = container_of(notifier, VirtMachineState,\n+ virtio_iommu_done);\n+ VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms);\n+ Object *container;\n+\n+\n+ if (vmc->no_iommu) {\n+ return;\n+ }\n+\n+ container = container_get(qdev_get_machine(), \"/peripheral\");\n+ bind_virtio_iommu_device(container, vms);\n+ container = container_get(qdev_get_machine(), \"/peripheral-anon\");\n+ bind_virtio_iommu_device(container, vms);\n+}\n+\n+static void create_virtio_iommu(VirtMachineState *vms, qemu_irq *pic)\n+{\n+ char *smmu;\n+ const char compat[] = \"virtio,mmio\";\n+ int irq = vms->irqmap[VIRT_IOMMU];\n+ hwaddr base = vms->memmap[VIRT_IOMMU].base;\n+ hwaddr size = vms->memmap[VIRT_IOMMU].size;\n+ VirtMachineClass *vmc = VIRT_MACHINE_GET_CLASS(vms);\n+\n+ if (vmc->no_iommu) {\n+ return;\n+ }\n+\n+ vms->iommu_phandle = qemu_fdt_alloc_phandle(vms->fdt);\n+\n+ sysbus_create_simple(\"virtio-mmio\", base, pic[irq]);\n+\n+ smmu = g_strdup_printf(\"/virtio_mmio@%\" PRIx64, base);\n+ qemu_fdt_add_subnode(vms->fdt, smmu);\n+ qemu_fdt_setprop(vms->fdt, smmu, \"compatible\", compat, sizeof(compat));\n+ qemu_fdt_setprop_sized_cells(vms->fdt, smmu, \"reg\", 2, base, 2, size);\n+\n+ qemu_fdt_setprop_cells(vms->fdt, smmu, \"interrupts\",\n+ GIC_FDT_IRQ_TYPE_SPI, irq, GIC_FDT_IRQ_FLAGS_EDGE_LO_HI);\n+\n+ qemu_fdt_setprop(vms->fdt, smmu, \"dma-coherent\", NULL, 0);\n+ qemu_fdt_setprop_cell(vms->fdt, smmu, \"#iommu-cells\", 1);\n+ qemu_fdt_setprop_cell(vms->fdt, smmu, \"phandle\", vms->iommu_phandle);\n+ g_free(smmu);\n+\n+ vms->virtio_iommu_done.notify = virtio_iommu_notifier;\n+ qemu_add_machine_init_done_notifier(&vms->virtio_iommu_done);\n+}\n+\n+static void create_pcie(VirtMachineState *vms, qemu_irq *pic)\n {\n hwaddr base_mmio = vms->memmap[VIRT_PCIE_MMIO].base;\n hwaddr size_mmio = vms->memmap[VIRT_PCIE_MMIO].size;\n@@ -1073,7 +1150,8 @@ static void create_pcie(const VirtMachineState *vms, qemu_irq *pic)\n }\n }\n \n- nodename = g_strdup_printf(\"/pcie@%\" PRIx64, base);\n+ vms->pcie_host_nodename = g_strdup_printf(\"/pcie@%\" PRIx64, base);\n+ nodename = vms->pcie_host_nodename;\n qemu_fdt_add_subnode(vms->fdt, nodename);\n qemu_fdt_setprop_string(vms->fdt, nodename,\n \"compatible\", \"pci-host-ecam-generic\");\n@@ -1112,7 +1190,6 @@ static void create_pcie(const VirtMachineState *vms, qemu_irq *pic)\n qemu_fdt_setprop_cell(vms->fdt, nodename, \"#interrupt-cells\", 1);\n create_pcie_irq_map(vms, vms->gic_phandle, irq, nodename);\n \n- g_free(nodename);\n }\n \n static void create_platform_bus(VirtMachineState *vms, qemu_irq *pic)\n@@ -1457,16 +1534,16 @@ static void machvirt_init(MachineState *machine)\n \n create_rtc(vms, pic);\n \n- create_pcie(vms, pic);\n-\n- create_gpio(vms, pic);\n-\n /* Create mmio transports, so the user can create virtio backends\n * (which will be automatically plugged in to the transports). If\n * no backend is created the transport will just sit harmlessly idle.\n */\n create_virtio_devices(vms, pic);\n \n+ create_pcie(vms, pic);\n+\n+ create_gpio(vms, pic);\n+\n vms->fw_cfg = create_fw_cfg(vms, &address_space_memory);\n rom_set_fw(vms->fw_cfg);\n \n@@ -1491,6 +1568,7 @@ static void machvirt_init(MachineState *machine)\n * Notifiers are executed in registration reverse order.\n */\n create_platform_bus(vms, pic);\n+ create_virtio_iommu(vms, pic);\n }\n \n static bool virt_get_secure(Object *obj, Error **errp)\ndiff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h\nindex ff27551..e00fa65 100644\n--- a/include/hw/arm/virt.h\n+++ b/include/hw/arm/virt.h\n@@ -59,6 +59,7 @@ enum {\n VIRT_GIC_V2M,\n VIRT_GIC_ITS,\n VIRT_GIC_REDIST,\n+ VIRT_IOMMU,\n VIRT_UART,\n VIRT_MMIO,\n VIRT_RTC,\n@@ -91,6 +92,7 @@ typedef struct {\n typedef struct {\n MachineState parent;\n Notifier machine_done;\n+ Notifier virtio_iommu_done;\n FWCfgState *fw_cfg;\n bool secure;\n bool highmem;\n@@ -106,6 +108,8 @@ typedef struct {\n uint32_t clock_phandle;\n uint32_t gic_phandle;\n uint32_t msi_phandle;\n+ uint32_t iommu_phandle;\n+ char *pcie_host_nodename;\n int psci_conduit;\n } VirtMachineState;\n \n","prefixes":["RFC","v4","12/16"]}