{"id":815193,"url":"http://patchwork.ozlabs.org/api/patches/815193/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20170918215351.16318-1-f4bug@amsat.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170918215351.16318-1-f4bug@amsat.org>","list_archive_url":null,"date":"2017-09-18T21:53:51","name":"!fixup arm: missed comment update","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"2435fddc5ddcbe4aaa083cff1e7fe5aab337c4b0","submitter":{"id":70924,"url":"http://patchwork.ozlabs.org/api/people/70924/?format=json","name":"Philippe Mathieu-Daudé","email":"f4bug@amsat.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20170918215351.16318-1-f4bug@amsat.org/mbox/","series":[{"id":3741,"url":"http://patchwork.ozlabs.org/api/series/3741/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=3741","date":"2017-09-18T21:53:51","name":"!fixup arm: missed comment update","version":1,"mbox":"http://patchwork.ozlabs.org/series/3741/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/815193/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/815193/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; 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charset=UTF-8","Content-Transfer-Encoding":"8bit","X-detected-operating-system":"by eggs.gnu.org: Genre and OS details not\n\trecognized.","X-Received-From":"2607:f8b0:400d:c0d::244","Subject":"[Qemu-devel] [PATCH] !fixup arm: missed comment update","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Peter Maydell , qemu-arm@nongnu.org,\n\t=?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= ,\n\tqemu-devel@nongnu.org","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"},"content":"Signed-off-by: Philippe Mathieu-Daudé \n---\nBased-on: 1505318697-77161-6-git-send-email-imammedo@redhat.com\n\n include/hw/arm/armv7m.h | 2 +-\n 1 file changed, 1 insertion(+), 1 deletion(-)","diff":"diff --git a/include/hw/arm/armv7m.h b/include/hw/arm/armv7m.h\nindex 68cb30d611..9ad316c76e 100644\n--- a/include/hw/arm/armv7m.h\n+++ b/include/hw/arm/armv7m.h\n@@ -35,7 +35,7 @@ typedef struct {\n /* ARMv7M container object.\n * + Unnamed GPIO input lines: external IRQ lines for the NVIC\n * + Named GPIO output SYSRESETREQ: signalled for guest AIRCR.SYSRESETREQ\n- * + Property \"cpu-model\": CPU model to instantiate\n+ * + Property \"cpu-type\": CPU type to instantiate\n * + Property \"num-irq\": number of external IRQ lines\n * + Property \"memory\": MemoryRegion defining the physical address space\n * that CPU accesses see. (The NVIC, bitbanding and other CPU-internal\n","prefixes":[]}