{"id":815159,"url":"http://patchwork.ozlabs.org/api/patches/815159/?format=json","web_url":"http://patchwork.ozlabs.org/project/linuxppc-dev/patch/1505767187-4596-2-git-send-email-roy.pledge@nxp.com/","project":{"id":2,"url":"http://patchwork.ozlabs.org/api/projects/2/?format=json","name":"Linux PPC development","link_name":"linuxppc-dev","list_id":"linuxppc-dev.lists.ozlabs.org","list_email":"linuxppc-dev@lists.ozlabs.org","web_url":"https://github.com/linuxppc/wiki/wiki","scm_url":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git","webscm_url":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/","list_archive_url":"https://lore.kernel.org/linuxppc-dev/","list_archive_url_format":"https://lore.kernel.org/linuxppc-dev/{}/","commit_url_format":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}"},"msgid":"<1505767187-4596-2-git-send-email-roy.pledge@nxp.com>","list_archive_url":"https://lore.kernel.org/linuxppc-dev/1505767187-4596-2-git-send-email-roy.pledge@nxp.com/","date":"2017-09-18T20:39:36","name":"[v5,01/12] soc/fsl/qbman: Add common routine for QBMan private allocations","commit_ref":null,"pull_url":null,"state":"not-applicable","archived":false,"hash":"d55a4e2621c3fb5350c345d62a69617b85d4b040","submitter":{"id":70252,"url":"http://patchwork.ozlabs.org/api/people/70252/?format=json","name":"Roy Pledge","email":"roy.pledge@nxp.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linuxppc-dev/patch/1505767187-4596-2-git-send-email-roy.pledge@nxp.com/mbox/","series":[{"id":3731,"url":"http://patchwork.ozlabs.org/api/series/3731/?format=json","web_url":"http://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=3731","date":"2017-09-18T20:39:38","name":"soc/fsl/qbman: Enable QBMan on ARM Platforms","version":5,"mbox":"http://patchwork.ozlabs.org/series/3731/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/815159/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/815159/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xwyjc5kyBz9s7p\n\tfor ;\n\tTue, 19 Sep 2017 06:47:00 +1000 (AEST)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xwyjc4vGmzDqjf\n\tfor ;\n\tTue, 19 Sep 2017 06:47:00 +1000 (AEST)","from NAM02-BL2-obe.outbound.protection.outlook.com\n\t(mail-bl2nam02on0048.outbound.protection.outlook.com [104.47.38.48])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xwyYV4rsBzDq5k\n\tfor ;\n\tTue, 19 Sep 2017 06:39:56 +1000 (AEST)","from DM5PR03CA0035.namprd03.prod.outlook.com (2603:10b6:4:3b::24)\n\tby\n\tSN2PR03MB2367.namprd03.prod.outlook.com (2603:10b6:804:e::18) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id 15.20.56.9;\n\tMon, 18 Sep 2017 20:39:52 +0000","from BY2FFO11FD042.protection.gbl (2a01:111:f400:7c0c::170) by\n\tDM5PR03CA0035.outlook.office365.com (2603:10b6:4:3b::24) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id\n\t15.20.56.9 via Frontend Transport; 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\n\tclient-ip=192.88.168.50; helo=tx30smr01.am.freescale.net;","From":"Roy Pledge ","To":", ,\n\t, ,\n\t","Subject":"[v5 01/12] soc/fsl/qbman: Add common routine for QBMan private\n\tallocations","Date":"Mon, 18 Sep 2017 16:39:36 -0400","Message-ID":"<1505767187-4596-2-git-send-email-roy.pledge@nxp.com>","X-Mailer":"git-send-email 2.7.4","In-Reply-To":"<1505767187-4596-1-git-send-email-roy.pledge@nxp.com>","References":"<1505767187-4596-1-git-send-email-roy.pledge@nxp.com>","X-EOPAttributedMessage":"0","X-Matching-Connectors":"131502407919137887;\n\t(91ab9b29-cfa4-454e-5278-08d120cd25b8); ()","X-Forefront-Antispam-Report":"CIP:192.88.168.50; IPV:NLI; CTRY:US; EFV:NLI;\n\tSFV:NSPM;\n\tSFS:(10009020)(6009001)(336005)(7966004)(39860400002)(376002)(346002)(39380400002)(2980300002)(1109001)(1110001)(339900001)(189002)(199003)(43066003)(106466001)(53936002)(50466002)(33646002)(81166006)(54906002)(4326008)(81156014)(68736007)(5003940100001)(48376002)(7416002)(50226002)(8936002)(305945005)(6666003)(2950100002)(105606002)(189998001)(104016004)(47776003)(5660300001)(8676002)(2906002)(97736004)(356003)(36756003)(86362001)(2201001)(77096006)(50986999)(76176999)(8656003)(3450700001)(498600001)(85426001)(316002)(16586007)(110136005)(2004002)(2101003);\n\tDIR:OUT; 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","X-Forefront-PRVS":"04347F8039","SpamDiagnosticOutput":"1:99","SpamDiagnosticMetadata":"NSPM","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"18 Sep 2017 20:39:51.6953\n\t(UTC)","X-MS-Exchange-CrossTenant-Id":"5afe0b00-7697-4969-b663-5eab37d5f47e","X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp":"TenantId=5afe0b00-7697-4969-b663-5eab37d5f47e;\n\tIp=[192.88.168.50]; \n\tHelo=[tx30smr01.am.freescale.net]","X-MS-Exchange-CrossTenant-FromEntityHeader":"HybridOnPrem","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"SN2PR03MB2367","X-BeenThere":"linuxppc-dev@lists.ozlabs.org","X-Mailman-Version":"2.1.24","Precedence":"list","List-Id":"Linux on PowerPC Developers Mail List\n\t","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Reply-To":"roy.pledge@nxp.com","Cc":"mark.rutland@arm.com, arnd@arndb.de, madalin.bucur@nxp.com,\n\tcatalin.marinas@arm.com, Roy Pledge ,\n\tlinux@armlinux.org.uk, oss@buserror.net","Errors-To":"linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org","Sender":"\"Linuxppc-dev\"\n\t"},"content":"The QBMan device uses several memory regions to manage frame\nqueues and buffers. Add a common routine for extracting and\ninitializing these reserved memory areas.\n\nSigned-off-by: Roy Pledge \n---\n drivers/soc/fsl/qbman/Makefile | 2 +-\n drivers/soc/fsl/qbman/dpaa_sys.c | 78 ++++++++++++++++++++++++++++++++++++++++\n drivers/soc/fsl/qbman/dpaa_sys.h | 4 +++\n 3 files changed, 83 insertions(+), 1 deletion(-)\n create mode 100644 drivers/soc/fsl/qbman/dpaa_sys.c","diff":"diff --git a/drivers/soc/fsl/qbman/Makefile b/drivers/soc/fsl/qbman/Makefile\nindex 7ae199f..3cbd08a 100644\n--- a/drivers/soc/fsl/qbman/Makefile\n+++ b/drivers/soc/fsl/qbman/Makefile\n@@ -1,6 +1,6 @@\n obj-$(CONFIG_FSL_DPAA) += bman_ccsr.o qman_ccsr.o \\\n \t\t\t\t\t\t bman_portal.o qman_portal.o \\\n-\t\t\t\t\t\t bman.o qman.o\n+\t\t\t\t\t\t bman.o qman.o dpaa_sys.o\n \n obj-$(CONFIG_FSL_BMAN_TEST) += bman-test.o\n bman-test-y = bman_test.o\ndiff --git a/drivers/soc/fsl/qbman/dpaa_sys.c b/drivers/soc/fsl/qbman/dpaa_sys.c\nnew file mode 100644\nindex 0000000..9436aa8\n--- /dev/null\n+++ b/drivers/soc/fsl/qbman/dpaa_sys.c\n@@ -0,0 +1,78 @@\n+/* Copyright 2017 NXP Semiconductor, Inc.\n+ *\n+ * Redistribution and use in source and binary forms, with or without\n+ * modification, are permitted provided that the following conditions are met:\n+ * * Redistributions of source code must retain the above copyright\n+ *\t notice, this list of conditions and the following disclaimer.\n+ * * Redistributions in binary form must reproduce the above copyright\n+ *\t notice, this list of conditions and the following disclaimer in the\n+ *\t documentation and/or other materials provided with the distribution.\n+ * * Neither the name of NXP Semiconductor nor the\n+ *\t names of its contributors may be used to endorse or promote products\n+ *\t derived from this software without specific prior written permission.\n+ *\n+ * ALTERNATIVELY, this software may be distributed under the terms of the\n+ * GNU General Public License (\"GPL\") as published by the Free Software\n+ * Foundation, either version 2 of that License or (at your option) any\n+ * later version.\n+ *\n+ * THIS SOFTWARE IS PROVIDED BY NXP Semiconductor ``AS IS'' AND ANY\n+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED\n+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE\n+ * DISCLAIMED. IN NO EVENT SHALL NXP Semiconductor BE LIABLE FOR ANY\n+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES\n+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;\n+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND\n+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT\n+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS\n+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n+ */\n+\n+#include \n+#include \"dpaa_sys.h\"\n+\n+/*\n+ * Initialize a devices private memory region\n+ */\n+int qbman_init_private_mem(struct device *dev, int idx, dma_addr_t *addr,\n+\t\t\t\tsize_t *size)\n+{\n+\tint ret;\n+\tstruct device_node *mem_node;\n+\tu64 size64;\n+\n+\tret = of_reserved_mem_device_init_by_idx(dev, dev->of_node, idx);\n+\tif (ret) {\n+\t\tdev_err(dev,\n+\t\t\t\"of_reserved_mem_device_init_by_idx(%d) failed 0x%x\\n\",\n+\t\t\tidx, ret);\n+\t\treturn -ENODEV;\n+\t}\n+\tmem_node = of_parse_phandle(dev->of_node, \"memory-region\", 0);\n+\tif (mem_node) {\n+\t\tret = of_property_read_u64(mem_node, \"size\", &size64);\n+\t\tif (ret) {\n+\t\t\tdev_err(dev, \"of_address_to_resource fails 0x%x\\n\",\n+\t\t\t ret);\n+\t\t\treturn -ENODEV;\n+\t\t}\n+\t\t*size = size64;\n+\t} else {\n+\t\tdev_err(dev, \"No memory-region found for index %d\\n\", idx);\n+\t\treturn -ENODEV;\n+\t}\n+\n+\tif (!dma_zalloc_coherent(dev, *size, addr, 0)) {\n+\t\tdev_err(dev, \"DMA Alloc memory failed\\n\");\n+\t\treturn -ENODEV;\n+\t}\n+\n+\t/*\n+\t * Disassociate the reserved memory area from the device\n+\t * because a device can only have one DMA memory area. This\n+\t * should be fine since the memory is allocated and initialized\n+\t * and only ever accessed by the QBMan device from now on\n+\t */\n+\tof_reserved_mem_device_release(dev);\n+\treturn 0;\n+}\ndiff --git a/drivers/soc/fsl/qbman/dpaa_sys.h b/drivers/soc/fsl/qbman/dpaa_sys.h\nindex 2ce394a..676af82 100644\n--- a/drivers/soc/fsl/qbman/dpaa_sys.h\n+++ b/drivers/soc/fsl/qbman/dpaa_sys.h\n@@ -102,4 +102,8 @@ static inline u8 dpaa_cyc_diff(u8 ringsize, u8 first, u8 last)\n /* Offset applied to genalloc pools due to zero being an error return */\n #define DPAA_GENALLOC_OFF\t0x80000000\n \n+/* Initialize the devices private memory region */\n+int qbman_init_private_mem(struct device *dev, int idx, dma_addr_t *addr,\n+\t\t\t\tsize_t *size);\n+\n #endif\t/* __DPAA_SYS_H */\n","prefixes":["v5","01/12"]}