{"id":815154,"url":"http://patchwork.ozlabs.org/api/patches/815154/?format=json","web_url":"http://patchwork.ozlabs.org/project/linuxppc-dev/patch/1505767187-4596-4-git-send-email-roy.pledge@nxp.com/","project":{"id":2,"url":"http://patchwork.ozlabs.org/api/projects/2/?format=json","name":"Linux PPC development","link_name":"linuxppc-dev","list_id":"linuxppc-dev.lists.ozlabs.org","list_email":"linuxppc-dev@lists.ozlabs.org","web_url":"https://github.com/linuxppc/wiki/wiki","scm_url":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git","webscm_url":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/","list_archive_url":"https://lore.kernel.org/linuxppc-dev/","list_archive_url_format":"https://lore.kernel.org/linuxppc-dev/{}/","commit_url_format":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}"},"msgid":"<1505767187-4596-4-git-send-email-roy.pledge@nxp.com>","list_archive_url":"https://lore.kernel.org/linuxppc-dev/1505767187-4596-4-git-send-email-roy.pledge@nxp.com/","date":"2017-09-18T20:39:38","name":"[v5,03/12] soc/fsl/qbman: Use shared-dma-pool for QMan private memory allocations","commit_ref":null,"pull_url":null,"state":"not-applicable","archived":false,"hash":"7d04edaae6ac912573b39d0a097fc03dd60d7baf","submitter":{"id":70252,"url":"http://patchwork.ozlabs.org/api/people/70252/?format=json","name":"Roy Pledge","email":"roy.pledge@nxp.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linuxppc-dev/patch/1505767187-4596-4-git-send-email-roy.pledge@nxp.com/mbox/","series":[{"id":3731,"url":"http://patchwork.ozlabs.org/api/series/3731/?format=json","web_url":"http://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=3731","date":"2017-09-18T20:39:38","name":"soc/fsl/qbman: Enable QBMan on ARM Platforms","version":5,"mbox":"http://patchwork.ozlabs.org/series/3731/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/815154/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/815154/checks/","tags":{},"related":[],"headers":{"Return-Path":"<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>","X-Original-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xwybg6xB0z9s78\n\tfor <patchwork-incoming@ozlabs.org>;\n\tTue, 19 Sep 2017 06:41:51 +1000 (AEST)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xwybg64GnzDqXn\n\tfor <patchwork-incoming@ozlabs.org>;\n\tTue, 19 Sep 2017 06:41:51 +1000 (AEST)","from NAM01-BY2-obe.outbound.protection.outlook.com\n\t(mail-by2nam01on0065.outbound.protection.outlook.com [104.47.34.65])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xwyYV4wkQzDqBc\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tTue, 19 Sep 2017 06:39:58 +1000 (AEST)","from BLUPR0301CA0009.namprd03.prod.outlook.com (10.162.113.147) by\n\tMWHPR03MB2702.namprd03.prod.outlook.com (10.168.207.136) with\n\tMicrosoft SMTP Server (version=TLS1_2,\n\tcipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384_P256) id\n\t15.20.56.11; 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()","X-Forefront-Antispam-Report":"CIP:192.88.168.50; IPV:NLI; CTRY:US; EFV:NLI;\n\tSFV:NSPM;\n\tSFS:(10009020)(6009001)(7966004)(336005)(39380400002)(39860400002)(376002)(346002)(2980300002)(1110001)(1109001)(339900001)(199003)(189002)(50986999)(3450700001)(189998001)(5003940100001)(48376002)(50466002)(33646002)(2950100002)(105606002)(6666003)(106466001)(54906002)(53936002)(104016004)(2906002)(76176999)(43066003)(305945005)(36756003)(50226002)(85426001)(230783001)(8936002)(356003)(97736004)(498600001)(8656003)(47776003)(81166006)(4326008)(5660300001)(81156014)(77096006)(2201001)(8676002)(86362001)(316002)(7416002)(68736007)(110136005)(16586007)(2101003);\n\tDIR:OUT; SFP:1101; SCL:1; SRVR:MWHPR03MB2702;\n\tH:tx30smr01.am.freescale.net; \n\tFPR:; SPF:Fail; PTR:InfoDomainNonexistent; A:1; MX:1; LANG:en; ","X-Microsoft-Exchange-Diagnostics":["1; BN1AFFO11FD039;\n\t1:z5Y/W1Bels9i+qeuHn8hJPwfUyLs6rYhXsTOTqyTLBpiwARkw0aMubfzed/Q6v7+P64h1L+FnfzW4X/S+R9Lmf+jN6qj3BEOUdzYtfZtS8Kz4bhNEUAAJHBRlwvXgkye","1; MWHPR03MB2702;\n\t3:ce6oIERqMjkVb2CVt7du4r69JcmhjL+geUT8kYgQKowvNksYiLWIvWndhd1ZxUv0K4/H7z9t+tAhuCWt1mGUS+rwLQOWLhJe50qwYVgKRLFGQ35mDrrd9nfNRzDUY2FzWxHdeUHZ/TjODIk5McmfBEJBVC6Pl85R5St3xbkG3rq1mfO3zYKJsslYpSZH4QHpzJ2C7T1YZqTT1WjPlA446SKRM7jsSrU0xxHHirpKAk1KNyuQ9Amak5jkkAS9vK25UgeJLz6jytuKuYmv0SZRiRG236BilvxDyiYm4lH3OByhjkAOfXSkCbBnNZwnCd6RvNZoQVQUYZY1yWIfdiWC0cypyKH0rDs0awbbMAbAJQ8=;\n\t25:A49Vadxe6aEpmLU80h7Bd8KoK7aBlLKRbEWv7aF4aN+XNbFFZE4BRnPC5ftow64oA5ZPobKrsfe1THdRNlCPdW2O5lG1n5L+F5Z9pI2QdO0KY0gCFhehvwMdz1XvW02LY1Q9cjg+MWEaVhynutC4sprHlBlVWEK7aYwp/e++xJ02stwGFQZ36JBldP4Jie4UO7CRFOc7RwQvZOvDBJIUTvtCpU9NZV9nrCbkR+I7fD320ZGcBNiHJpE/KZLtOQF4T4FlXfzj/ZutrqBF+7rOuTWzIkCr92u1nHtsu9HbhJnoQchlu7lmbeWAe+yjfAmdY57UrnL9kArLUqGHisnPAg==","1; MWHPR03MB2702;\n\t31:TAxbZZdR9uMBoQHPw+Do/ezdE4en6Xe3hnQTgrso+U7Q0GkNaA97gwZd4lmOfM1d6Z8aU4xbBC63EGSIVW/WMFncjZ/+ZaaNrXnHnbgMfkublr4Zx2Jndbokl8fwgB8ri6jCqk7I3R15MtP/qu0t+wcIHfOXgsiujG4ErMz7VqrrL3JQKw6XsSyn4fWWYPBEcacKqeaUqQw21l4juQJXQwsW9lb57WJBRpFWUxFX2so=;\n\t4:G0PAtnXK6S0xch4XNSBVrfgFKMvggO6bCp+zY/as/TD4d+QOIdiQVr/E0OmfcFqlx9BtNftF/SY8pE0iHeXl81YXUekhref2oEeYS/wJeByHgLlF3PO+uijbNcsbMHLJtRN7vbzBa8hKNjXMyNNgz+YnzqWSz1g6vx26zNPkRowlVWpfQa3cJJxOHCBNRKgKxNzECTKbY7ZU4YovZy3JiiUfZcbpcZeOk+dESKj8Wyet8HPO/lxw4y89K9b48R9cwhDozxym0xdAmF7wG0lYqIbWv/b7CYB48CWEVjU8lg4=","=?us-ascii?Q?1; MWHPR03MB2702;\n\t23:hW2N19zzJ911RW/gHDX4C2229ohEcYfipXbiQdHJf?=\n\tNUj/xdyVI9W2d7TuapV5nf05yx+mroKWmJ7SmXhfFiS3iKl/7d7mp6o0nqjsfc5Sm4mzcp6FhHzhdWR03XverCTXs1tdizGfU5c0tzBPp86XiHw2YYTyF4sNu76HF3LA4vqKgqoDS7dmrXK9l+0/Xnuiz9mzkRqdLUXBxhTbjvEqOnzblSUeylcRGph6QLivAx8oELu2eKg/79NmQHWdEmGlMrb0Kx6d3byyEfQr07jQcTqbRQvupHbj18pthNf6oaC5DXBIM3VXHkncFxwFvJ7S+RXtevlNIOXIazsdiUXMJ6TLqQEOyvGLe8H6MLGL+bKFkveXGFnNI/6aP1HAHJTuHk0U16kgB5lol7H4vOPXB4sulTK697XxReQfvu55dguC1URWCpkmgRn+QwcwQDiZwWS4VAfSwnieuZmgOOQr1nN7uqremq9MwC5lK1zBiZ8Vz3ntBXE0Why2eSyGALmGJYnPQ19scnj30s0N5Y9N1Z/UkJKGxeMyLAeyr55LaEw1X1Yx/hrpSLToV6O3TvrV1Iuo5kBWPfDnLzm0KzXYPjANVBR30v7x0s0yC7TIO7JlI3hndAirU/2Nic6eQUD6r/79AP/lODF0lDtTy4xkx4G7WtMLNpQK0ON1DvZOwD9SJlbvwFeKdV2s/zsdNW8TgQzz5PmC4AOnn+7MzDy76XVXWxqfewD2ouF7Kr4QwGz0ivkaxNK94gjrRXfbNkiWiah9o+TRVI88VD6p9stynOJTS+/XddTms0UBVVot3KHIGWx8c/VZY2W6xL2hRxFbKsziA0L6e8q+0zgDNfE9wMCcElxD5jJ6zoX82sISp8X1D4IIYV5LnEu5hmropRT+TWncTNx12gWf3lnfNIzGai2cBPM9Jn0Jx11nmKAXHWaMNaN/TMEXA4lrIRk3uoOA6KmTxCqKVG0KF6GSnsFKFGaLQIdAQU2W9G2T3yagk9ksZ7QnRQX4CCpzz76GC6BWCFB+UFdrWgiJ2L5D0XGuHtKtL7n2cBgdkG3qEvHvY5lLdb+W/Z6Y7Eicb9gWMYA2E9pM6sxqO2No5qMcM1lHL/uyrKTj2L+SG5JlGwyNYOGEezzICZdjSEgAf6EpxfpTsSQRz0Hyjp1DjweRVOPjx1aDoCDJWwnmcpZwszrkQCor4KEj7e04TNkF8XXIOw5YDiaAsG7pp/ngDm729lrl0MskaNxhoLxeBot8iEYY7abSaIuX1yxcUbXajs8maq7+JmrJ26UvqnCk5t+LuuyKQ==","1; MWHPR03MB2702;\n\t6:aFDa0RBBRf0dvy7LUhJCE9zhYnAavay8/Kmf5D4yeVvGIJCst5lr78SWUAOrLipjfFyg6+R97AWV2gUZB3e20jOI50e318fEyK2YJ3n7PaQ5WMO8sroPM2s+JTj4R+jgPXo6YL2Egb5+oaLp/iBru4AjfGIb48BbI2iO/2W4WDSFQNON2Rd5Ry5c3eNaG/pHeqgZp3KAQrJ5ji3ywHqpTmSyRLtnUskKXF71koOLgQ+kb+6EdOGrqH6yZ5Rak+h9Xd8GxsaDwqYQOhvpQDbwRAx2qcHIN1eTKceczOnqEeeg09YnMNCcrhjQAzWQT1jVrW1txKtVMqxQv7Lr8RiRIQ==;\n\t5:VSNerCgS6X8cfz9l9biYFJ0c+bGy8NDXyfOYUD/Z9wLx59P5CACB3ffFB5zcxJ7B4sKSHjMRQiNcpwQ6wXA6DNBIWMRw/sn7hXCgrbRET0lgyRqNL9exZ7YbmXj08VZh96mioeyt6aSEyJ0uhDdNdQ==;\n\t24:uHKBc22kX1vWoGR3qkODFeFUdy2XEqv87CTGo65xtUCrRLaDlWasaKPYgqQfGOBmi+qvQ90WcBvkS+eBo9xmk01f8RZz1O41jPAmrukrhhw=;\n\t7:66Kk2N6qsIPdbQPcKEdI5+8wYtx114d3sbzrzxmPWrWLp9171DB1CrvkB6MU33G6jrTHSqut4imAybrnfcJDk8XYvoVBVuk4oGHYlqba36ExblGXatlMoIecPRGiLXRw9fYnPlo8m/6slmBgMFTzWlSIejXTEiyRJgAwypmqtOWqHFtXt7u+FxA5qpCJt7J34JAvwyJsvn/yKJtP2/PvoThRb2iLjAEvqsMT0mmwBlk="],"MIME-Version":"1.0","Content-Type":"text/plain","X-MS-PublicTrafficType":"Email","X-MS-Office365-Filtering-Correlation-Id":"344648fd-038a-417a-b099-08d4fed56ad9","X-Microsoft-Antispam":"UriScan:; BCL:0; PCL:0;\n\tRULEID:(300000500095)(300135000095)(300000501095)(300135300095)(22001)(300000502095)(300135100095)(300000503095)(300135400095)(2017052603199)(201703131430075)(201703131517081)(300000504095)(300135200095)(300000505095)(300135600095)(300000506095)(300135500095);\n\tSRVR:MWHPR03MB2702; ","X-MS-TrafficTypeDiagnostic":"MWHPR03MB2702:","X-Exchange-Antispam-Report-Test":"UriScan:(185117386973197);","X-Microsoft-Antispam-PRVS":"<MWHPR03MB2702CFFB241E835951B7C14F86630@MWHPR03MB2702.namprd03.prod.outlook.com>","X-Exchange-Antispam-Report-CFA-Test":"BCL:0; PCL:0;\n\tRULEID:(100000700101)(100105000095)(100000701101)(100105300095)(100000702101)(100105100095)(6095135)(2401047)(8121501046)(5005006)(3002001)(10201501046)(93006095)(93001095)(100000703101)(100105400095)(6055026)(6096035)(201703131430075)(201703131441075)(201703131448075)(201703131433075)(201703161259150)(20161123563025)(20161123559100)(20161123565025)(20161123556025)(20161123561025)(201708071742011)(100000704101)(100105200095)(100000705101)(100105500095);\n\tSRVR:MWHPR03MB2702; BCL:0; PCL:0;\n\tRULEID:(100000800101)(100110000095)(100000801101)(100110300095)(100000802101)(100110100095)(100000803101)(100110400095)(400006)(100000804101)(100110200095)(100000805101)(100110500095);\n\tSRVR:MWHPR03MB2702; ","X-Forefront-PRVS":"04347F8039","SpamDiagnosticOutput":"1:99","SpamDiagnosticMetadata":"NSPM","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"18 Sep 2017 20:39:53.8507\n\t(UTC)","X-MS-Exchange-CrossTenant-Id":"5afe0b00-7697-4969-b663-5eab37d5f47e","X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp":"TenantId=5afe0b00-7697-4969-b663-5eab37d5f47e;\n\tIp=[192.88.168.50]; \n\tHelo=[tx30smr01.am.freescale.net]","X-MS-Exchange-CrossTenant-FromEntityHeader":"HybridOnPrem","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"MWHPR03MB2702","X-BeenThere":"linuxppc-dev@lists.ozlabs.org","X-Mailman-Version":"2.1.24","Precedence":"list","List-Id":"Linux on PowerPC Developers Mail List\n\t<linuxppc-dev.lists.ozlabs.org>","List-Unsubscribe":"<https://lists.ozlabs.org/options/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=unsubscribe>","List-Archive":"<http://lists.ozlabs.org/pipermail/linuxppc-dev/>","List-Post":"<mailto:linuxppc-dev@lists.ozlabs.org>","List-Help":"<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=help>","List-Subscribe":"<https://lists.ozlabs.org/listinfo/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=subscribe>","Reply-To":"roy.pledge@nxp.com","Cc":"mark.rutland@arm.com, arnd@arndb.de, madalin.bucur@nxp.com,\n\tcatalin.marinas@arm.com, Roy Pledge <roy.pledge@nxp.com>,\n\tlinux@armlinux.org.uk, oss@buserror.net","Errors-To":"linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org","Sender":"\"Linuxppc-dev\"\n\t<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>"},"content":"Use the shared-memory-pool mechanism for frame queue descriptor and\npacked frame descriptor record area allocations.\n\nSigned-off-by: Roy Pledge <roy.pledge@nxp.com>\n---\n drivers/soc/fsl/qbman/qman_ccsr.c | 93 ++++++++++++++++++++++++++-------------\n drivers/soc/fsl/qbman/qman_priv.h |  2 -\n drivers/soc/fsl/qbman/qman_test.h |  2 -\n 3 files changed, 63 insertions(+), 34 deletions(-)","diff":"diff --git a/drivers/soc/fsl/qbman/qman_ccsr.c b/drivers/soc/fsl/qbman/qman_ccsr.c\nindex 835ce94..607355b9 100644\n--- a/drivers/soc/fsl/qbman/qman_ccsr.c\n+++ b/drivers/soc/fsl/qbman/qman_ccsr.c\n@@ -401,21 +401,42 @@ static int qm_init_pfdr(struct device *dev, u32 pfdr_start, u32 num)\n }\n \n /*\n- * Ideally we would use the DMA API to turn rmem->base into a DMA address\n- * (especially if iommu translations ever get involved).  Unfortunately, the\n- * DMA API currently does not allow mapping anything that is not backed with\n- * a struct page.\n+ * QMan needs two global memory areas initialized at boot time:\n+ *  1) FQD: Frame Queue Descriptors used to manage frame queues\n+ *  2) PFDR: Packed Frame Queue Descriptor Records used to store frames\n+ * Both areas are reserved using the device tree reserved memory framework\n+ * and the addresses and sizes are initialized when the QMan device is probed\n  */\n static dma_addr_t fqd_a, pfdr_a;\n static size_t fqd_sz, pfdr_sz;\n \n+#ifdef CONFIG_PPC\n+/*\n+ * Support for PPC Device Tree backward compatibility when compatible\n+ * string is set to fsl-qman-fqd and fsl-qman-pfdr\n+ */\n+static int zero_priv_mem(phys_addr_t addr, size_t sz)\n+{\n+\t/* map as cacheable, non-guarded */\n+\tvoid __iomem *tmpp = ioremap_prot(addr, sz, 0);\n+\n+\tif (!tmpp)\n+\t\treturn -ENOMEM;\n+\n+\tmemset_io(tmpp, 0, sz);\n+\tflush_dcache_range((unsigned long)tmpp,\n+\t\t\t   (unsigned long)tmpp + sz);\n+\tiounmap(tmpp);\n+\n+\treturn 0;\n+}\n+\n static int qman_fqd(struct reserved_mem *rmem)\n {\n \tfqd_a = rmem->base;\n \tfqd_sz = rmem->size;\n \n \tWARN_ON(!(fqd_a && fqd_sz));\n-\n \treturn 0;\n }\n RESERVEDMEM_OF_DECLARE(qman_fqd, \"fsl,qman-fqd\", qman_fqd);\n@@ -431,32 +452,13 @@ static int qman_pfdr(struct reserved_mem *rmem)\n }\n RESERVEDMEM_OF_DECLARE(qman_pfdr, \"fsl,qman-pfdr\", qman_pfdr);\n \n+#endif\n+\n static unsigned int qm_get_fqid_maxcnt(void)\n {\n \treturn fqd_sz / 64;\n }\n \n-/*\n- * Flush this memory range from data cache so that QMAN originated\n- * transactions for this memory region could be marked non-coherent.\n- */\n-static int zero_priv_mem(struct device *dev, struct device_node *node,\n-\t\t\t phys_addr_t addr, size_t sz)\n-{\n-\t/* map as cacheable, non-guarded */\n-\tvoid __iomem *tmpp = ioremap_prot(addr, sz, 0);\n-\n-\tif (!tmpp)\n-\t\treturn -ENOMEM;\n-\n-\tmemset_io(tmpp, 0, sz);\n-\tflush_dcache_range((unsigned long)tmpp,\n-\t\t\t   (unsigned long)tmpp + sz);\n-\tiounmap(tmpp);\n-\n-\treturn 0;\n-}\n-\n static void log_edata_bits(struct device *dev, u32 bit_count)\n {\n \tu32 i, j, mask = 0xffffffff;\n@@ -727,10 +729,41 @@ static int fsl_qman_probe(struct platform_device *pdev)\n \t\tqm_channel_caam = QMAN_CHANNEL_CAAM_REV3;\n \t}\n \n-\tret = zero_priv_mem(dev, node, fqd_a, fqd_sz);\n-\tWARN_ON(ret);\n-\tif (ret)\n-\t\treturn -ENODEV;\n+\tif (fqd_a) {\n+#ifdef CONFIG_PPC\n+\t\t/*\n+\t\t * For PPC backward DT compatibility\n+\t\t * FQD memory MUST be zero'd by software\n+\t\t */\n+\t\tzero_priv_mem(fqd_a, fqd_sz);\n+#else\n+\t\tWARN(1, \"Unexpected architecture using non shared-dma-mem reservations\");\n+#endif\n+\t} else {\n+\t\t/*\n+\t\t * Order of memory regions is assumed as FQD followed by PFDR\n+\t\t * in order to ensure allocations from the correct regions the\n+\t\t * driver initializes then allocates each piece in order\n+\t\t */\n+\t\tret = qbman_init_private_mem(dev, 0, &fqd_a, &fqd_sz);\n+\t\tif (ret) {\n+\t\t\tdev_err(dev, \"qbman_init_private_mem() for FQD failed 0x%x\\n\",\n+\t\t\t\tret);\n+\t\t\treturn -ENODEV;\n+\t\t}\n+\t}\n+\tdev_dbg(dev, \"Allocated FQD 0x%llx 0x%zx\\n\", fqd_a, fqd_sz);\n+\n+\tif (!pfdr_a) {\n+\t\t/* Setup PFDR memory */\n+\t\tret = qbman_init_private_mem(dev, 1, &pfdr_a, &pfdr_sz);\n+\t\tif (ret) {\n+\t\t\tdev_err(dev, \"qbman_init_private_mem() for PFDR failed 0x%x\\n\",\n+\t\t\t\tret);\n+\t\t\treturn -ENODEV;\n+\t\t}\n+\t}\n+\tdev_dbg(dev, \"Allocated PFDR 0x%llx 0x%zx\\n\", pfdr_a, pfdr_sz);\n \n \tret = qman_init_ccsr(dev);\n \tif (ret) {\ndiff --git a/drivers/soc/fsl/qbman/qman_priv.h b/drivers/soc/fsl/qbman/qman_priv.h\nindex 5fe9faf..b1e2cbf 100644\n--- a/drivers/soc/fsl/qbman/qman_priv.h\n+++ b/drivers/soc/fsl/qbman/qman_priv.h\n@@ -28,8 +28,6 @@\n  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.\n  */\n \n-#define pr_fmt(fmt) KBUILD_MODNAME \": \" fmt\n-\n #include \"dpaa_sys.h\"\n \n #include <soc/fsl/qman.h>\ndiff --git a/drivers/soc/fsl/qbman/qman_test.h b/drivers/soc/fsl/qbman/qman_test.h\nindex d5f8cb2..41bdbc48 100644\n--- a/drivers/soc/fsl/qbman/qman_test.h\n+++ b/drivers/soc/fsl/qbman/qman_test.h\n@@ -30,7 +30,5 @@\n \n #include \"qman_priv.h\"\n \n-#define pr_fmt(fmt) KBUILD_MODNAME \": \" fmt\n-\n int qman_test_stash(void);\n int qman_test_api(void);\n","prefixes":["v5","03/12"]}