{"id":815143,"url":"http://patchwork.ozlabs.org/api/patches/815143/?format=json","web_url":"http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20170918192651.78404-4-bryantly@linux.vnet.ibm.com/","project":{"id":2,"url":"http://patchwork.ozlabs.org/api/projects/2/?format=json","name":"Linux PPC development","link_name":"linuxppc-dev","list_id":"linuxppc-dev.lists.ozlabs.org","list_email":"linuxppc-dev@lists.ozlabs.org","web_url":"https://github.com/linuxppc/wiki/wiki","scm_url":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git","webscm_url":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/","list_archive_url":"https://lore.kernel.org/linuxppc-dev/","list_archive_url_format":"https://lore.kernel.org/linuxppc-dev/{}/","commit_url_format":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}"},"msgid":"<20170918192651.78404-4-bryantly@linux.vnet.ibm.com>","list_archive_url":"https://lore.kernel.org/linuxppc-dev/20170918192651.78404-4-bryantly@linux.vnet.ibm.com/","date":"2017-09-18T19:26:51","name":"[v1,3/3] powerpc/kernel: Separate SR-IOV Calls","commit_ref":null,"pull_url":null,"state":"superseded","archived":true,"hash":"018764d48098496737cdda691cfa364d46059e28","submitter":{"id":72247,"url":"http://patchwork.ozlabs.org/api/people/72247/?format=json","name":"Bryant G. Ly","email":"bryantly@linux.vnet.ibm.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20170918192651.78404-4-bryantly@linux.vnet.ibm.com/mbox/","series":[{"id":3719,"url":"http://patchwork.ozlabs.org/api/series/3719/?format=json","web_url":"http://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=3719","date":"2017-09-18T19:26:48","name":"Prepartion for SR-IOV PowerVM Enablement","version":1,"mbox":"http://patchwork.ozlabs.org/series/3719/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/815143/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/815143/checks/","tags":{},"related":[],"headers":{"Return-Path":"<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>","X-Original-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xwxBt4hClz9s7v\n\tfor <patchwork-incoming@ozlabs.org>;\n\tTue, 19 Sep 2017 05:38:46 +1000 (AEST)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xwxBt3MHYzDqXw\n\tfor <patchwork-incoming@ozlabs.org>;\n\tTue, 19 Sep 2017 05:38:46 +1000 (AEST)","from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com\n\t[148.163.158.5])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xwwxz700szDq78\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tTue, 19 Sep 2017 05:27:35 +1000 (AEST)","from pps.filterd (m0098421.ppops.net [127.0.0.1])\n\tby mx0a-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv8IJOXXM031952\n\tfor <linuxppc-dev@lists.ozlabs.org>; Mon, 18 Sep 2017 15:27:33 -0400","from e11.ny.us.ibm.com (e11.ny.us.ibm.com [129.33.205.201])\n\tby mx0a-001b2d01.pphosted.com with ESMTP id 2d2g15gcg1-1\n\t(version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT)\n\tfor <linuxppc-dev@lists.ozlabs.org>; Mon, 18 Sep 2017 15:27:32 -0400","from localhost\n\tby e11.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use\n\tOnly! Violators will be prosecuted\n\tfor <linuxppc-dev@lists.ozlabs.org> from\n\t<bryantly@linux.vnet.ibm.com>; Mon, 18 Sep 2017 15:27:32 -0400","from b01cxnp23032.gho.pok.ibm.com (9.57.198.27)\n\tby e11.ny.us.ibm.com (146.89.104.198) with IBM ESMTP SMTP Gateway:\n\tAuthorized Use Only! Violators will be prosecuted; \n\tMon, 18 Sep 2017 15:27:28 -0400","from b01ledav002.gho.pok.ibm.com (b01ledav002.gho.pok.ibm.com\n\t[9.57.199.107])\n\tby b01cxnp23032.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP\n\tid v8IJRSG028639336; Mon, 18 Sep 2017 19:27:28 GMT","from b01ledav002.gho.pok.ibm.com (unknown [127.0.0.1])\n\tby IMSVA (Postfix) with ESMTP id D038D124037;\n\tMon, 18 Sep 2017 15:24:44 -0400 (EDT)","from bryants-mbp-3.rchland.ibm.com (unknown [9.10.79.138])\n\tby b01ledav002.gho.pok.ibm.com (Postfix) with ESMTP id 63F4012403D;\n\tMon, 18 Sep 2017 15:24:44 -0400 (EDT)"],"Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=linux.vnet.ibm.com\n\t(client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com;\n\tenvelope-from=bryantly@linux.vnet.ibm.com; receiver=<UNKNOWN>)","From":"\"Bryant G. Ly\" <bryantly@linux.vnet.ibm.com>","To":"bhelgaas@google.com, benh@kernel.crashing.org, paulus@samba.org,\n\tmpe@ellerman.id.au","Subject":"[PATCH v1 3/3] powerpc/kernel: Separate SR-IOV Calls","Date":"Mon, 18 Sep 2017 14:26:51 -0500","X-Mailer":"git-send-email 2.11.0 (Apple Git-81)","In-Reply-To":"<20170918192651.78404-1-bryantly@linux.vnet.ibm.com>","References":"<20170918192651.78404-1-bryantly@linux.vnet.ibm.com>","X-TM-AS-GCONF":"00","x-cbid":"17091819-2213-0000-0000-0000021D3ACA","X-IBM-SpamModules-Scores":"","X-IBM-SpamModules-Versions":"BY=3.00007757; HX=3.00000241; KW=3.00000007;\n\tPH=3.00000004; SC=3.00000230; SDB=6.00918924; UDB=6.00461645;\n\tIPR=6.00699150; \n\tBA=6.00005595; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009;\n\tZB=6.00000000; \n\tZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00017199;\n\tXFM=3.00000015; UTC=2017-09-18 19:27:30","X-IBM-AV-DETECTION":"SAVI=unused REMOTE=unused XFE=unused","x-cbparentid":"17091819-2214-0000-0000-000057965C3E","Message-Id":"<20170918192651.78404-4-bryantly@linux.vnet.ibm.com>","X-Proofpoint-Virus-Version":"vendor=fsecure engine=2.50.10432:, ,\n\tdefinitions=2017-09-18_08:, , signatures=0","X-Proofpoint-Spam-Details":"rule=outbound_notspam policy=outbound score=0\n\tspamscore=0 suspectscore=0\n\tmalwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam\n\tadjust=0 reason=mlx scancount=1 engine=8.0.1-1707230000\n\tdefinitions=main-1709180274","X-BeenThere":"linuxppc-dev@lists.ozlabs.org","X-Mailman-Version":"2.1.24","Precedence":"list","List-Id":"Linux on PowerPC Developers Mail List\n\t<linuxppc-dev.lists.ozlabs.org>","List-Unsubscribe":"<https://lists.ozlabs.org/options/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=unsubscribe>","List-Archive":"<http://lists.ozlabs.org/pipermail/linuxppc-dev/>","List-Post":"<mailto:linuxppc-dev@lists.ozlabs.org>","List-Help":"<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=help>","List-Subscribe":"<https://lists.ozlabs.org/listinfo/linuxppc-dev>,\n\t<mailto:linuxppc-dev-request@lists.ozlabs.org?subject=subscribe>","Cc":"linux-pci@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,\n\t\"Bryant G. Ly\" <bryantly@linux.vnet.ibm.com>,\n\t\"Juan J . Alvarez\" <jjalvare@us.ibm.com>","Errors-To":"linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org","Sender":"\"Linuxppc-dev\"\n\t<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>"},"content":"SR-IOV can now be enabled in PowerNV platforms and Pseries\nplatforms. Therefore, the appropriate calls were moved to\nmachine dependent code instead of definition at compile time.\n\nSigned-off-by: Bryant G. Ly <bryantly@linux.vnet.ibm.com>\nSigned-off-by: Juan J. Alvarez <jjalvare@us.ibm.com>\n---\n arch/powerpc/include/asm/machdep.h           |  7 ++++++\n arch/powerpc/include/asm/pci-bridge.h        |  4 +---\n arch/powerpc/kernel/eeh_driver.c             |  4 ++--\n arch/powerpc/kernel/pci-common.c             | 23 +++++++++++++++++++\n arch/powerpc/kernel/pci_dn.c                 |  6 -----\n arch/powerpc/platforms/powernv/eeh-powernv.c | 34 +++++++++++++++-------------\n arch/powerpc/platforms/powernv/pci-ioda.c    |  6 +++--\n 7 files changed, 55 insertions(+), 29 deletions(-)","diff":"diff --git a/arch/powerpc/include/asm/machdep.h b/arch/powerpc/include/asm/machdep.h\nindex 73b92017b6d7..20f68d36af8c 100644\n--- a/arch/powerpc/include/asm/machdep.h\n+++ b/arch/powerpc/include/asm/machdep.h\n@@ -172,11 +172,18 @@ struct machdep_calls {\n \t/* Called after scan and before resource survey */\n \tvoid (*pcibios_fixup_phb)(struct pci_controller *hose);\n \n+\t/* Called after device has been added to bus and\n+\t * before sysfs has been created\n+\t */\n+\tvoid (*pcibios_bus_add_device)(struct pci_dev *pdev);\n+\n \tresource_size_t (*pcibios_default_alignment)(void);\n \n #ifdef CONFIG_PCI_IOV\n \tvoid (*pcibios_fixup_sriov)(struct pci_dev *pdev);\n \tresource_size_t (*pcibios_iov_resource_alignment)(struct pci_dev *, int resno);\n+\tint (*pcibios_sriov_enable)(struct pci_dev *pdev, u16 num_vfs);\n+\tint (*pcibios_sriov_disable)(struct pci_dev *pdev);\n #endif /* CONFIG_PCI_IOV */\n \n \t/* Called to shutdown machine specific hardware not already controlled\ndiff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h\nindex 0b8aa1fe2d5f..323628ca4d6d 100644\n--- a/arch/powerpc/include/asm/pci-bridge.h\n+++ b/arch/powerpc/include/asm/pci-bridge.h\n@@ -203,10 +203,9 @@ struct pci_dn {\n \tstruct eeh_dev *edev;\t\t/* eeh device */\n #endif\n #define IODA_INVALID_PE\t\t0xFFFFFFFF\n-#ifdef CONFIG_PPC_POWERNV\n \tunsigned int pe_number;\n-\tint     vf_index;\t\t/* VF index in the PF */\n #ifdef CONFIG_PCI_IOV\n+\tint     vf_index;\t\t/* VF index in the PF */\n \tu16     vfs_expanded;\t\t/* number of VFs IOV BAR expanded */\n \tu16     num_vfs;\t\t/* number of VFs enabled*/\n \tunsigned int *pe_num_map;\t/* PE# for the first VF PE or array */\n@@ -215,7 +214,6 @@ struct pci_dn {\n \tint     (*m64_map)[PCI_SRIOV_NUM_BARS];\n #endif /* CONFIG_PCI_IOV */\n \tint\tmps;\t\t\t/* Maximum Payload Size */\n-#endif\n \tstruct list_head child_list;\n \tstruct list_head list;\n };\ndiff --git a/arch/powerpc/kernel/eeh_driver.c b/arch/powerpc/kernel/eeh_driver.c\nindex 8b840191df59..f2d1b369974d 100644\n--- a/arch/powerpc/kernel/eeh_driver.c\n+++ b/arch/powerpc/kernel/eeh_driver.c\n@@ -440,7 +440,7 @@ static void *eeh_add_virt_device(void *data, void *userdata)\n \t\t\treturn NULL;\n \t}\n \n-#ifdef CONFIG_PPC_POWERNV\n+#ifdef CONFIG_PCI_IOV\n \tpci_iov_add_virtfn(edev->physfn, pdn->vf_index, 0);\n #endif\n \treturn NULL;\n@@ -496,7 +496,7 @@ static void *eeh_rmv_device(void *data, void *userdata)\n \t\t(*removed)++;\n \n \tif (edev->physfn) {\n-#ifdef CONFIG_PPC_POWERNV\n+#ifdef CONFIG_PCI_IOV\n \t\tstruct pci_dn *pdn = eeh_dev_to_pdn(edev);\n \n \t\tpci_iov_remove_virtfn(edev->physfn, pdn->vf_index, 0);\ndiff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c\nindex 02831a396419..d45b956d2e3a 100644\n--- a/arch/powerpc/kernel/pci-common.c\n+++ b/arch/powerpc/kernel/pci-common.c\n@@ -249,8 +249,31 @@ resource_size_t pcibios_iov_resource_alignment(struct pci_dev *pdev, int resno)\n \n \treturn pci_iov_resource_size(pdev, resno);\n }\n+\n+int pcibios_sriov_enable(struct pci_dev *pdev, u16 num_vfs)\n+{\n+\tif (ppc_md.pcibios_sriov_enable)\n+\t\treturn ppc_md.pcibios_sriov_enable(pdev, num_vfs);\n+\n+\treturn 0;\n+}\n+\n+int pcibios_sriov_disable(struct pci_dev *pdev)\n+{\n+\tif (ppc_md.pcibios_sriov_disable)\n+\t\treturn ppc_md.pcibios_sriov_disable(pdev);\n+\n+\treturn 0;\n+}\n+\n #endif /* CONFIG_PCI_IOV */\n \n+void pcibios_bus_add_device(struct pci_dev *pdev)\n+{\n+\tif (ppc_md.pcibios_bus_add_device)\n+\t\tppc_md.pcibios_bus_add_device(pdev);\n+}\n+\n static resource_size_t pcibios_io_size(const struct pci_controller *hose)\n {\n #ifdef CONFIG_PPC64\ndiff --git a/arch/powerpc/kernel/pci_dn.c b/arch/powerpc/kernel/pci_dn.c\nindex 0e395afbf0f4..ab147a1909c8 100644\n--- a/arch/powerpc/kernel/pci_dn.c\n+++ b/arch/powerpc/kernel/pci_dn.c\n@@ -156,10 +156,8 @@ static struct pci_dn *add_one_dev_pci_data(struct pci_dn *parent,\n \tpdn->parent = parent;\n \tpdn->busno = busno;\n \tpdn->devfn = devfn;\n-#ifdef CONFIG_PPC_POWERNV\n \tpdn->vf_index = vf_index;\n \tpdn->pe_number = IODA_INVALID_PE;\n-#endif\n \tINIT_LIST_HEAD(&pdn->child_list);\n \tINIT_LIST_HEAD(&pdn->list);\n \tlist_add_tail(&pdn->list, &parent->child_list);\n@@ -226,9 +224,7 @@ void remove_dev_pci_data(struct pci_dev *pdev)\n \t */\n \tif (pdev->is_virtfn) {\n \t\tpdn = pci_get_pdn(pdev);\n-#ifdef CONFIG_PPC_POWERNV\n \t\tpdn->pe_number = IODA_INVALID_PE;\n-#endif\n \t\treturn;\n \t}\n \n@@ -294,9 +290,7 @@ struct pci_dn *pci_add_device_node_info(struct pci_controller *hose,\n \t\treturn NULL;\n \tdn->data = pdn;\n \tpdn->phb = hose;\n-#ifdef CONFIG_PPC_POWERNV\n \tpdn->pe_number = IODA_INVALID_PE;\n-#endif\n \tregs = of_get_property(dn, \"reg\", NULL);\n \tif (regs) {\n \t\tu32 addr = of_read_number(regs, 1);\ndiff --git a/arch/powerpc/platforms/powernv/eeh-powernv.c b/arch/powerpc/platforms/powernv/eeh-powernv.c\nindex 8864065eba22..349571e995ea 100644\n--- a/arch/powerpc/platforms/powernv/eeh-powernv.c\n+++ b/arch/powerpc/platforms/powernv/eeh-powernv.c\n@@ -44,6 +44,22 @@\n static bool pnv_eeh_nb_init = false;\n static int eeh_event_irq = -EINVAL;\n \n+void pnv_pcibios_bus_add_device(struct pci_dev *pdev)\n+{\n+\tstruct pci_dn *pdn = pci_get_pdn(pdev);\n+\n+\tif (!pdev->is_virtfn)\n+\t\treturn;\n+\n+\t/*\n+\t * The following operations will fail if VF's sysfs files\n+\t * aren't created or its resources aren't finalized.\n+\t */\n+\teeh_add_device_early(pdn);\n+\teeh_add_device_late(pdev);\n+\teeh_sysfs_add_device(pdev);\n+}\n+\n static int pnv_eeh_init(void)\n {\n \tstruct pci_controller *hose;\n@@ -88,6 +104,8 @@ static int pnv_eeh_init(void)\n \n \teeh_set_pe_aux_size(max_diag_size);\n \n+\tppc_md.pcibios_bus_add_device = pnv_pcibios_bus_add_device;\n+\n \treturn 0;\n }\n \n@@ -1747,22 +1765,6 @@ static struct eeh_ops pnv_eeh_ops = {\n \t.restore_config\t\t= pnv_eeh_restore_config\n };\n \n-void pcibios_bus_add_device(struct pci_dev *pdev)\n-{\n-\tstruct pci_dn *pdn = pci_get_pdn(pdev);\n-\n-\tif (!pdev->is_virtfn)\n-\t\treturn;\n-\n-\t/*\n-\t * The following operations will fail if VF's sysfs files\n-\t * aren't created or its resources aren't finalized.\n-\t */\n-\teeh_add_device_early(pdn);\n-\teeh_add_device_late(pdev);\n-\teeh_sysfs_add_device(pdev);\n-}\n-\n #ifdef CONFIG_PCI_IOV\n static void pnv_pci_fixup_vf_mps(struct pci_dev *pdev)\n {\ndiff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c\nindex 57f9e55f4352..f7fed25e06ba 100644\n--- a/arch/powerpc/platforms/powernv/pci-ioda.c\n+++ b/arch/powerpc/platforms/powernv/pci-ioda.c\n@@ -1674,7 +1674,7 @@ int pnv_pci_sriov_enable(struct pci_dev *pdev, u16 num_vfs)\n \treturn ret;\n }\n \n-int pcibios_sriov_disable(struct pci_dev *pdev)\n+int pnv_pcibios_sriov_disable(struct pci_dev *pdev)\n {\n \tpnv_pci_sriov_disable(pdev);\n \n@@ -1683,7 +1683,7 @@ int pcibios_sriov_disable(struct pci_dev *pdev)\n \treturn 0;\n }\n \n-int pcibios_sriov_enable(struct pci_dev *pdev, u16 num_vfs)\n+int pnv_pcibios_sriov_enable(struct pci_dev *pdev, u16 num_vfs)\n {\n \t/* Allocate PCI data */\n \tadd_dev_pci_data(pdev);\n@@ -4002,6 +4002,8 @@ static void __init pnv_pci_init_ioda_phb(struct device_node *np,\n #ifdef CONFIG_PCI_IOV\n \tppc_md.pcibios_fixup_sriov = pnv_pci_ioda_fixup_iov_resources;\n \tppc_md.pcibios_iov_resource_alignment = pnv_pci_iov_resource_alignment;\n+\tppc_md.pcibios_sriov_enable = pnv_pcibios_sriov_enable;\n+\tppc_md.pcibios_sriov_disable = pnv_pcibios_sriov_disable;\n #endif\n \n \tpci_add_flags(PCI_REASSIGN_ALL_RSRC);\n","prefixes":["v1","3/3"]}