{"id":815012,"url":"http://patchwork.ozlabs.org/api/patches/815012/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20170918160012.4317-23-david@redhat.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170918160012.4317-23-david@redhat.com>","list_archive_url":null,"date":"2017-09-18T16:00:07","name":"[v1,22/27] s390x/tcg: implement SIGP CONDITIONAL EMERGENCY SIGNAL","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"6dd3377f45bde4dd625c2db84dcbc25f689124f2","submitter":{"id":70402,"url":"http://patchwork.ozlabs.org/api/people/70402/?format=json","name":"David Hildenbrand","email":"david@redhat.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20170918160012.4317-23-david@redhat.com/mbox/","series":[{"id":3672,"url":"http://patchwork.ozlabs.org/api/series/3672/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=3672","date":"2017-09-18T15:59:45","name":"s390x: SMP for TCG (+ cleanups)","version":1,"mbox":"http://patchwork.ozlabs.org/series/3672/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/815012/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/815012/checks/","tags":{},"related":[],"headers":{"Return-Path":"<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=208.118.235.17; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)","ext-mx01.extmail.prod.ext.phx2.redhat.com;\n\tdmarc=none (p=none dis=none) header.from=redhat.com","ext-mx01.extmail.prod.ext.phx2.redhat.com;\n\tspf=fail smtp.mailfrom=david@redhat.com"],"Received":["from lists.gnu.org (lists.gnu.org [208.118.235.17])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xwrff6v5kz9s78\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 19 Sep 2017 02:14:02 +1000 (AEST)","from localhost ([::1]:37632 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1dtygK-0000og-T1\n\tfor incoming@patchwork.ozlabs.org; Mon, 18 Sep 2017 12:14:00 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:37950)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from <david@redhat.com>) id 1dtyUk-0007j6-9k\n\tfor qemu-devel@nongnu.org; Mon, 18 Sep 2017 12:02:09 -0400","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from <david@redhat.com>) id 1dtyUh-0008I5-TR\n\tfor qemu-devel@nongnu.org; Mon, 18 Sep 2017 12:02:02 -0400","from mx1.redhat.com ([209.132.183.28]:47880)\n\tby eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from <david@redhat.com>) id 1dtyUh-0008Hm-Kg\n\tfor qemu-devel@nongnu.org; Mon, 18 Sep 2017 12:01:59 -0400","from smtp.corp.redhat.com\n\t(int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby mx1.redhat.com (Postfix) with ESMTPS id 73AB77F3F3;\n\tMon, 18 Sep 2017 16:01:58 +0000 (UTC)","from t460s.redhat.com (unknown [10.36.118.72])\n\tby smtp.corp.redhat.com (Postfix) with ESMTP id E7C2E5D6A8;\n\tMon, 18 Sep 2017 16:01:55 +0000 (UTC)"],"DMARC-Filter":"OpenDMARC Filter v1.3.2 mx1.redhat.com 73AB77F3F3","From":"David Hildenbrand <david@redhat.com>","To":"qemu-devel@nongnu.org","Date":"Mon, 18 Sep 2017 18:00:07 +0200","Message-Id":"<20170918160012.4317-23-david@redhat.com>","In-Reply-To":"<20170918160012.4317-1-david@redhat.com>","References":"<20170918160012.4317-1-david@redhat.com>","X-Scanned-By":"MIMEDefang 2.79 on 10.5.11.15","X-Greylist":"Sender IP whitelisted, not delayed by milter-greylist-4.5.16\n\t(mx1.redhat.com [10.5.110.25]);\n\tMon, 18 Sep 2017 16:01:58 +0000 (UTC)","X-detected-operating-system":"by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic]\n\t[fuzzy]","X-Received-From":"209.132.183.28","Subject":"[Qemu-devel] [PATCH v1 22/27] s390x/tcg: implement SIGP CONDITIONAL\n\tEMERGENCY SIGNAL","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"<qemu-devel.nongnu.org>","List-Unsubscribe":"<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>","List-Archive":"<http://lists.nongnu.org/archive/html/qemu-devel/>","List-Post":"<mailto:qemu-devel@nongnu.org>","List-Help":"<mailto:qemu-devel-request@nongnu.org?subject=help>","List-Subscribe":"<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>","Cc":"Matthew Rosato <mjrosato@linux.vnet.ibm.com>, thuth@redhat.com,\n\tdavid@redhat.com, cohuck@redhat.com, Richard Henderson\n\t<richard.henderson@linaro.org>, Alexander Graf <agraf@suse.de>,\n\tborntraeger@de.ibm.com, \tIgor Mammedov <imammedo@redhat.com>,\n\t=?utf-8?q?Alex_Benn=C3=A9e?= <alex.bennee@linaro.org>,\n\tAurelien Jarno <aurelien@aurel32.net>","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>"},"content":"Mostly analogous to the kernel/KVM version (so I assume the checks are\ncorrect :) ). As a preparation for TCG.\n\nSigned-off-by: David Hildenbrand <david@redhat.com>\n---\n target/s390x/cpu.h  |  1 +\n target/s390x/sigp.c | 37 +++++++++++++++++++++++++++++++++++++\n 2 files changed, 38 insertions(+)","diff":"diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h\nindex 5aa755d7b5..97d4abb6c0 100644\n--- a/target/s390x/cpu.h\n+++ b/target/s390x/cpu.h\n@@ -594,6 +594,7 @@ struct sysib_322 {\n #define SIGP_SET_PREFIX        0x0d\n #define SIGP_STORE_STATUS_ADDR 0x0e\n #define SIGP_SET_ARCH          0x12\n+#define SIGP_COND_EMERGENCY    0x13\n #define SIGP_SENSE_RUNNING     0x15\n #define SIGP_STORE_ADTL_STATUS 0x17\n \ndiff --git a/target/s390x/sigp.c b/target/s390x/sigp.c\nindex d492885787..ce8fda9d01 100644\n--- a/target/s390x/sigp.c\n+++ b/target/s390x/sigp.c\n@@ -290,6 +290,40 @@ static void sigp_set_prefix(CPUState *cs, run_on_cpu_data arg)\n     si->cc = SIGP_CC_ORDER_CODE_ACCEPTED;\n }\n \n+static void sigp_cond_emergency(S390CPU *src_cpu, S390CPU *dst_cpu,\n+                                SigpInfo *si)\n+{\n+    const uint64_t psw_int_mask = PSW_MASK_IO | PSW_MASK_EXT;\n+    uint16_t p_asn, s_asn, asn;\n+    uint64_t psw_addr, psw_mask;\n+    bool idle;\n+\n+    if (!tcg_enabled()) {\n+        /* handled in KVM */\n+        set_sigp_status(si, SIGP_STAT_INVALID_ORDER);\n+        return;\n+    }\n+\n+    /* this looks racy, but these values are only used when STOPPED */\n+    idle = CPU(dst_cpu)->halted;\n+    psw_addr = dst_cpu->env.psw.addr;\n+    psw_mask = dst_cpu->env.psw.mask;\n+    asn = si->param;\n+    p_asn = dst_cpu->env.cregs[4] & 0xffff;  /* Primary ASN */\n+    s_asn = dst_cpu->env.cregs[3] & 0xffff;  /* Secondary ASN */\n+\n+    if (s390_cpu_get_state(dst_cpu) != CPU_STATE_STOPPED ||\n+        (psw_mask & psw_int_mask) != psw_int_mask ||\n+        (idle && psw_addr != 0) ||\n+        (!idle && (asn == p_asn || asn == s_asn))) {\n+        cpu_inject_emergency_signal(dst_cpu, src_cpu->env.core_id);\n+    } else {\n+        set_sigp_status(si, SIGP_STAT_INCORRECT_STATE);\n+    }\n+\n+    si->cc = SIGP_CC_ORDER_CODE_ACCEPTED;\n+}\n+\n static void sigp_sense_running(S390CPU *dst_cpu, SigpInfo *si)\n {\n     if (!tcg_enabled()) {\n@@ -369,6 +403,9 @@ static int handle_sigp_single_dst(S390CPU *cpu, S390CPU *dst_cpu, uint8_t order,\n     case SIGP_CPU_RESET:\n         run_on_cpu(CPU(dst_cpu), sigp_cpu_reset, RUN_ON_CPU_HOST_PTR(&si));\n         break;\n+    case SIGP_COND_EMERGENCY:\n+        sigp_cond_emergency(cpu, dst_cpu, &si);\n+        break;\n     case SIGP_SENSE_RUNNING:\n         sigp_sense_running(dst_cpu, &si);\n         break;\n","prefixes":["v1","22/27"]}