{"id":814935,"url":"http://patchwork.ozlabs.org/api/patches/814935/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/1505742050-5697-15-git-send-email-bmeng.cn@gmail.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1505742050-5697-15-git-send-email-bmeng.cn@gmail.com>","list_archive_url":null,"date":"2017-09-18T13:40:50","name":"[U-Boot,14/14] usb: xhci: Set 'Average TRB Length' to 8 for control endpoints","commit_ref":null,"pull_url":null,"state":"accepted","archived":false,"hash":"ec913fad56c655a85161131e393265c58b2aaf8f","submitter":{"id":64981,"url":"http://patchwork.ozlabs.org/api/people/64981/?format=json","name":"Bin Meng","email":"bmeng.cn@gmail.com"},"delegate":{"id":1699,"url":"http://patchwork.ozlabs.org/api/users/1699/?format=json","username":"marex","first_name":"Marek","last_name":"Vasut","email":"marek.vasut@gmail.com"},"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/1505742050-5697-15-git-send-email-bmeng.cn@gmail.com/mbox/","series":[{"id":3647,"url":"http://patchwork.ozlabs.org/api/series/3647/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=3647","date":"2017-09-18T13:40:36","name":"usb: xhci: Add interrupt transfer support and full speed device support","version":1,"mbox":"http://patchwork.ozlabs.org/series/3647/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/814935/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/814935/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; 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charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "},"content":"Update the codes to conform with xHCI spec chapter 6.2.3.\n\nSigned-off-by: Bin Meng \n\n---\n\n drivers/usb/host/xhci-mem.c | 6 ++++++\n drivers/usb/host/xhci.c | 6 ++++++\n 2 files changed, 12 insertions(+)","diff":"diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c\nindex 84982a9..0582a9b 100644\n--- a/drivers/usb/host/xhci-mem.c\n+++ b/drivers/usb/host/xhci-mem.c\n@@ -850,6 +850,12 @@ void xhci_setup_addressable_virt_dev(struct xhci_ctrl *ctrl,\n \ttrb_64 = (uintptr_t)virt_dev->eps[0].ring->first_seg->trbs;\n \tep0_ctx->deq = cpu_to_le64(trb_64 | virt_dev->eps[0].ring->cycle_state);\n \n+\t/*\n+\t * xHCI spec 6.2.3:\n+\t * software shall set 'Average TRB Length' to 8 for control endpoints.\n+\t */\n+\tep0_ctx->tx_info = cpu_to_le32(EP_AVG_TRB_LENGTH(8));\n+\n \t/* Steps 7 and 8 were done in xhci_alloc_virt_device() */\n \n \txhci_flush_cache((uintptr_t)ep0_ctx, sizeof(struct xhci_ep_ctx));\ndiff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c\nindex 93737b0..4673738 100644\n--- a/drivers/usb/host/xhci.c\n+++ b/drivers/usb/host/xhci.c\n@@ -601,6 +601,12 @@ static int xhci_set_configuration(struct usb_device *udev)\n \t\tep_ctx[ep_index]->deq = cpu_to_le64(trb_64 |\n \t\t\t\tvirt_dev->eps[ep_index].ring->cycle_state);\n \n+\t\t/*\n+\t\t * xHCI spec 6.2.3:\n+\t\t * 'Average TRB Length' should be 8 for control endpoints.\n+\t\t */\n+\t\tif (usb_endpoint_xfer_control(endpt_desc))\n+\t\t\tavg_trb_len = 8;\n \t\tep_ctx[ep_index]->tx_info =\n \t\t\tcpu_to_le32(EP_MAX_ESIT_PAYLOAD_LO(max_esit_payload) |\n \t\t\tEP_AVG_TRB_LENGTH(avg_trb_len));\n","prefixes":["U-Boot","14/14"]}