{"id":814572,"url":"http://patchwork.ozlabs.org/api/patches/814572/?format=json","web_url":"http://patchwork.ozlabs.org/project/devicetree-bindings/patch/20170917031956.28010-7-stefan.bruens@rwth-aachen.de/","project":{"id":37,"url":"http://patchwork.ozlabs.org/api/projects/37/?format=json","name":"Devicetree Bindings","link_name":"devicetree-bindings","list_id":"devicetree.vger.kernel.org","list_email":"devicetree@vger.kernel.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170917031956.28010-7-stefan.bruens@rwth-aachen.de>","list_archive_url":null,"date":"2017-09-17T03:19:52","name":"[v2,06/10] arm64: allwinner: a64: Add devicetree binding for DMA controller","commit_ref":null,"pull_url":null,"state":"not-applicable","archived":true,"hash":"f08de4f8a2780766e47232f38e10547021ea381f","submitter":{"id":67055,"url":"http://patchwork.ozlabs.org/api/people/67055/?format=json","name":"Stefan Brüns","email":"stefan.bruens@rwth-aachen.de"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/devicetree-bindings/patch/20170917031956.28010-7-stefan.bruens@rwth-aachen.de/mbox/","series":[{"id":3479,"url":"http://patchwork.ozlabs.org/api/series/3479/?format=json","web_url":"http://patchwork.ozlabs.org/project/devicetree-bindings/list/?series=3479","date":"2017-09-17T03:19:46","name":"dmaengine: sun6i: Fixes for H3/A83T, enable A64","version":2,"mbox":"http://patchwork.ozlabs.org/series/3479/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/814572/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/814572/checks/","tags":{},"related":[],"headers":{"Return-Path":"<devicetree-owner@vger.kernel.org>","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=<UNKNOWN>)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xvvYY6sNxz9ryQ\n\tfor <incoming-dt@patchwork.ozlabs.org>;\n\tSun, 17 Sep 2017 13:21:21 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751396AbdIQDUM (ORCPT\n\t<rfc822;incoming-dt@patchwork.ozlabs.org>);\n\tSat, 16 Sep 2017 23:20:12 -0400","from mail-out-1.itc.rwth-aachen.de ([134.130.5.46]:15335 \"EHLO\n\tmail-out-1.itc.rwth-aachen.de\" rhost-flags-OK-OK-OK-OK)\n\tby vger.kernel.org with ESMTP id S1751370AbdIQDUL (ORCPT\n\t<rfc822; devicetree@vger.kernel.org>); Sat, 16 Sep 2017 23:20:11 -0400","from rwthex-w1-a.rwth-ad.de ([134.130.26.156])\n\tby mail-in-1.itc.rwth-aachen.de with ESMTP; 17 Sep 2017 05:20:10 +0200","from pebbles.fritz.box (85.183.223.53) by rwthex-w1-a.rwth-ad.de\n\t(2002:8682:1a9c::8682:1a9c) with Microsoft SMTP Server\n\t(version=TLS1_2, \n\tcipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1034.26;\n\tSun, 17 Sep 2017 05:20:09 +0200"],"X-IronPort-AV":"E=Sophos;i=\"5.42,405,1500933600\"; d=\"scan'208\";a=\"13708894\"","From":"=?utf-8?q?Stefan_Br=C3=BCns?= <stefan.bruens@rwth-aachen.de>","To":"<linux-sunxi@googlegroups.com>","CC":"<devicetree@vger.kernel.org>, <dmaengine@vger.kernel.org>,\n\tVinod Koul <vinod.koul@intel.com>,\n\t<linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>,\n\tMaxime Ripard <maxime.ripard@free-electrons.com>,\n\tChen-Yu Tsai <wens@csie.org>, Rob Herring <robh+dt@kernel.org>,\n\tCode Kipper <codekipper@gmail.com>,\n\tAndre Przywara <andre.przywara@arm.com>","Subject":"[PATCH v2 06/10] arm64: allwinner: a64: Add devicetree binding for\n\tDMA controller","Date":"Sun, 17 Sep 2017 05:19:52 +0200","Message-ID":"<20170917031956.28010-7-stefan.bruens@rwth-aachen.de>","X-Mailer":"git-send-email 2.14.1","In-Reply-To":"<20170917031956.28010-1-stefan.bruens@rwth-aachen.de>","References":"<20170917031956.28010-1-stefan.bruens@rwth-aachen.de>","MIME-Version":"1.0","Content-Type":"text/plain; charset=\"UTF-8\"","Content-Transfer-Encoding":"8bit","X-Originating-IP":"[85.183.223.53]","X-ClientProxiedBy":"rwthex-w1-b.rwth-ad.de (2002:8682:1a9d::8682:1a9d) To\n\trwthex-w1-a.rwth-ad.de (2002:8682:1a9c::8682:1a9c)","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<devicetree.vger.kernel.org>","X-Mailing-List":"devicetree@vger.kernel.org"},"content":"The A64 is register compatible with the H3, but has a different number\nof dma channels and request ports.\n\nAttach additional properties to the node to allow future reuse of the\ncompatible for controllers with different number of channels/requests.\n\nIf dma-requests is not specified, the register layout defined maximum\nof 32 is used.\n\nSigned-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>\n---\n .../devicetree/bindings/dma/sun6i-dma.txt          | 26 ++++++++++++++++++++++\n 1 file changed, 26 insertions(+)","diff":"diff --git a/Documentation/devicetree/bindings/dma/sun6i-dma.txt b/Documentation/devicetree/bindings/dma/sun6i-dma.txt\nindex 98fbe1a5c6dd..6ebc79f95202 100644\n--- a/Documentation/devicetree/bindings/dma/sun6i-dma.txt\n+++ b/Documentation/devicetree/bindings/dma/sun6i-dma.txt\n@@ -27,6 +27,32 @@ Example:\n \t\t#dma-cells = <1>;\n \t};\n \n+------------------------------------------------------------------------------\n+For A64 DMA controller:\n+\n+Required properties:\n+- compatible:\t\"allwinner,sun50i-a64-dma\"\n+- dma-channels: Number of DMA channels supported by the controller.\n+\t\tRefer to Documentation/devicetree/bindings/dma/dma.txt\n+- all properties above, i.e. reg, interrupts, clocks, resets and #dma-cells\n+\n+Optional properties:\n+- dma-requests: Number of DMA request signals supported by the controller.\n+\t\tRefer to Documentation/devicetree/bindings/dma/dma.txt\n+\n+Example:\n+\tdma: dma-controller@01c02000 {\n+\t\tcompatible = \"allwinner,sun50i-a64-dma\";\n+\t\treg = <0x01c02000 0x1000>;\n+\t\tinterrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;\n+\t\tclocks = <&ccu CLK_BUS_DMA>;\n+\t\tdma-channels = <8>;\n+\t\tdma-requests = <27>;\n+\t\tresets = <&ccu RST_BUS_DMA>;\n+\t\t#dma-cells = <1>;\n+\t};\n+------------------------------------------------------------------------------\n+\n Clients:\n \n DMA clients connected to the A31 DMA controller must use the format\n","prefixes":["v2","06/10"]}