{"id":814450,"url":"http://patchwork.ozlabs.org/api/patches/814450/?format=json","web_url":"http://patchwork.ozlabs.org/project/linuxppc-dev/patch/1505524870-4783-6-git-send-email-linuxram@us.ibm.com/","project":{"id":2,"url":"http://patchwork.ozlabs.org/api/projects/2/?format=json","name":"Linux PPC development","link_name":"linuxppc-dev","list_id":"linuxppc-dev.lists.ozlabs.org","list_email":"linuxppc-dev@lists.ozlabs.org","web_url":"https://github.com/linuxppc/wiki/wiki","scm_url":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git","webscm_url":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/","list_archive_url":"https://lore.kernel.org/linuxppc-dev/","list_archive_url_format":"https://lore.kernel.org/linuxppc-dev/{}/","commit_url_format":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/commit/?id={}"},"msgid":"<1505524870-4783-6-git-send-email-linuxram@us.ibm.com>","list_archive_url":"https://lore.kernel.org/linuxppc-dev/1505524870-4783-6-git-send-email-linuxram@us.ibm.com/","date":"2017-09-16T01:21:09","name":"[5/6] Documentation/x86: Move protecton key documentation to arch neutral directory","commit_ref":null,"pull_url":null,"state":"changes-requested","archived":false,"hash":"40a89e3f58b43460fc3d411dbc4181f938cfe841","submitter":{"id":2667,"url":"http://patchwork.ozlabs.org/api/people/2667/?format=json","name":"Ram Pai","email":"linuxram@us.ibm.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linuxppc-dev/patch/1505524870-4783-6-git-send-email-linuxram@us.ibm.com/mbox/","series":[{"id":3406,"url":"http://patchwork.ozlabs.org/api/series/3406/?format=json","web_url":"http://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=3406","date":"2017-09-16T01:21:04","name":"mm, x86, powerpc: Memory Protection Keys enhancement","version":1,"mbox":"http://patchwork.ozlabs.org/series/3406/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/814450/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/814450/checks/","tags":{},"related":[],"headers":{"Return-Path":"<linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org>","X-Original-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xvFBy2r3fz9t2l\n\tfor <patchwork-incoming@ozlabs.org>;\n\tSat, 16 Sep 2017 11:32:58 +1000 (AEST)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xvFBx5S8JzDqZC\n\tfor <patchwork-incoming@ozlabs.org>;\n\tSat, 16 Sep 2017 11:32:57 +1000 (AEST)","from mail-qk0-x241.google.com (mail-qk0-x241.google.com\n\t[IPv6:2607:f8b0:400d:c09::241])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xvDy14rYnzDrcM\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tSat, 16 Sep 2017 11:21:45 +1000 (AEST)","by mail-qk0-x241.google.com with SMTP id i14so2432927qke.3\n\tfor <linuxppc-dev@lists.ozlabs.org>;\n\tFri, 15 Sep 2017 18:21:45 -0700 (PDT)","from localhost.localdomain (50-39-103-96.bvtn.or.frontiernet.net.\n\t[50.39.103.96]) by smtp.gmail.com with ESMTPSA id\n\tv11sm1493189qkl.45.2017.09.15.18.21.41\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tFri, 15 Sep 2017 18:21:43 -0700 (PDT)"],"Authentication-Results":["ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"sVTDpI9y\"; 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It works by\n+dedicating 4 previously ignored bits in each page table entry to a\n+\"protection key\", giving 16 possible keys.\n+\n+There is also a new user-accessible register (PKRU) with two separate\n+bits (Access Disable and Write Disable) for each key.  Being a CPU\n+register, PKRU is inherently thread-local, potentially giving each\n+thread a different set of protections from every other thread.\n+\n+There are two new instructions (RDPKRU/WRPKRU) for reading and writing\n+to the new register.  The feature is only available in 64-bit mode,\n+even though there is theoretically space in the PAE PTEs.  These\n+permissions are enforced on data access only and have no effect on\n+instruction fetches.\n+\n+=========================== Syscalls ===========================\n+\n+There are 3 system calls which directly interact with pkeys:\n+\n+\tint pkey_alloc(unsigned long flags, unsigned long init_access_rights)\n+\tint pkey_free(int pkey);\n+\tint pkey_mprotect(unsigned long start, size_t len,\n+\t\t\t  unsigned long prot, int pkey);\n+\n+Before a pkey can be used, it must first be allocated with\n+pkey_alloc().  An application calls the WRPKRU instruction\n+directly in order to change access permissions to memory covered\n+with a key.  In this example WRPKRU is wrapped by a C function\n+called pkey_set().\n+\n+\tint real_prot = PROT_READ|PROT_WRITE;\n+\tpkey = pkey_alloc(0, PKEY_DENY_WRITE);\n+\tptr = mmap(NULL, PAGE_SIZE, PROT_NONE, MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);\n+\tret = pkey_mprotect(ptr, PAGE_SIZE, real_prot, pkey);\n+\t... application runs here\n+\n+Now, if the application needs to update the data at 'ptr', it can\n+gain access, do the update, then remove its write access:\n+\n+\tpkey_set(pkey, 0); // clear PKEY_DENY_WRITE\n+\t*ptr = foo; // assign something\n+\tpkey_set(pkey, PKEY_DENY_WRITE); // set PKEY_DENY_WRITE again\n+\n+Now when it frees the memory, it will also free the pkey since it\n+is no longer in use:\n+\n+\tmunmap(ptr, PAGE_SIZE);\n+\tpkey_free(pkey);\n+\n+(Note: pkey_set() is a wrapper for the RDPKRU and WRPKRU instructions.\n+ An example implementation can be found in\n+ tools/testing/selftests/x86/protection_keys.c)\n+\n+=========================== Behavior ===========================\n+\n+The kernel attempts to make protection keys consistent with the\n+behavior of a plain mprotect().  For instance if you do this:\n+\n+\tmprotect(ptr, size, PROT_NONE);\n+\tsomething(ptr);\n+\n+you can expect the same effects with protection keys when doing this:\n+\n+\tpkey = pkey_alloc(0, PKEY_DISABLE_WRITE | PKEY_DISABLE_READ);\n+\tpkey_mprotect(ptr, size, PROT_READ|PROT_WRITE, pkey);\n+\tsomething(ptr);\n+\n+That should be true whether something() is a direct access to 'ptr'\n+like:\n+\n+\t*ptr = foo;\n+\n+or when the kernel does the access on the application's behalf like\n+with a read():\n+\n+\tread(fd, ptr, 1);\n+\n+The kernel will send a SIGSEGV in both cases, but si_code will be set\n+to SEGV_PKERR when violating protection keys versus SEGV_ACCERR when\n+the plain mprotect() permissions are violated.\ndiff --git a/Documentation/x86/protection-keys.txt b/Documentation/x86/protection-keys.txt\ndeleted file mode 100644\nindex b643045..0000000\n--- a/Documentation/x86/protection-keys.txt\n+++ /dev/null\n@@ -1,85 +0,0 @@\n-Memory Protection Keys for Userspace (PKU aka PKEYs) is a CPU feature\n-which will be found on future Intel CPUs.\n-\n-Memory Protection Keys provides a mechanism for enforcing page-based\n-protections, but without requiring modification of the page tables\n-when an application changes protection domains.  It works by\n-dedicating 4 previously ignored bits in each page table entry to a\n-\"protection key\", giving 16 possible keys.\n-\n-There is also a new user-accessible register (PKRU) with two separate\n-bits (Access Disable and Write Disable) for each key.  Being a CPU\n-register, PKRU is inherently thread-local, potentially giving each\n-thread a different set of protections from every other thread.\n-\n-There are two new instructions (RDPKRU/WRPKRU) for reading and writing\n-to the new register.  The feature is only available in 64-bit mode,\n-even though there is theoretically space in the PAE PTEs.  These\n-permissions are enforced on data access only and have no effect on\n-instruction fetches.\n-\n-=========================== Syscalls ===========================\n-\n-There are 3 system calls which directly interact with pkeys:\n-\n-\tint pkey_alloc(unsigned long flags, unsigned long init_access_rights)\n-\tint pkey_free(int pkey);\n-\tint pkey_mprotect(unsigned long start, size_t len,\n-\t\t\t  unsigned long prot, int pkey);\n-\n-Before a pkey can be used, it must first be allocated with\n-pkey_alloc().  An application calls the WRPKRU instruction\n-directly in order to change access permissions to memory covered\n-with a key.  In this example WRPKRU is wrapped by a C function\n-called pkey_set().\n-\n-\tint real_prot = PROT_READ|PROT_WRITE;\n-\tpkey = pkey_alloc(0, PKEY_DENY_WRITE);\n-\tptr = mmap(NULL, PAGE_SIZE, PROT_NONE, MAP_ANONYMOUS|MAP_PRIVATE, -1, 0);\n-\tret = pkey_mprotect(ptr, PAGE_SIZE, real_prot, pkey);\n-\t... application runs here\n-\n-Now, if the application needs to update the data at 'ptr', it can\n-gain access, do the update, then remove its write access:\n-\n-\tpkey_set(pkey, 0); // clear PKEY_DENY_WRITE\n-\t*ptr = foo; // assign something\n-\tpkey_set(pkey, PKEY_DENY_WRITE); // set PKEY_DENY_WRITE again\n-\n-Now when it frees the memory, it will also free the pkey since it\n-is no longer in use:\n-\n-\tmunmap(ptr, PAGE_SIZE);\n-\tpkey_free(pkey);\n-\n-(Note: pkey_set() is a wrapper for the RDPKRU and WRPKRU instructions.\n- An example implementation can be found in\n- tools/testing/selftests/x86/protection_keys.c)\n-\n-=========================== Behavior ===========================\n-\n-The kernel attempts to make protection keys consistent with the\n-behavior of a plain mprotect().  For instance if you do this:\n-\n-\tmprotect(ptr, size, PROT_NONE);\n-\tsomething(ptr);\n-\n-you can expect the same effects with protection keys when doing this:\n-\n-\tpkey = pkey_alloc(0, PKEY_DISABLE_WRITE | PKEY_DISABLE_READ);\n-\tpkey_mprotect(ptr, size, PROT_READ|PROT_WRITE, pkey);\n-\tsomething(ptr);\n-\n-That should be true whether something() is a direct access to 'ptr'\n-like:\n-\n-\t*ptr = foo;\n-\n-or when the kernel does the access on the application's behalf like\n-with a read():\n-\n-\tread(fd, ptr, 1);\n-\n-The kernel will send a SIGSEGV in both cases, but si_code will be set\n-to SEGV_PKERR when violating protection keys versus SEGV_ACCERR when\n-the plain mprotect() permissions are violated.\n","prefixes":["5/6"]}