{"id":814314,"url":"http://patchwork.ozlabs.org/api/patches/814314/?format=json","web_url":"http://patchwork.ozlabs.org/project/gcc/patch/1505487594.26707.25.camel@brimstone.rchland.ibm.com/","project":{"id":17,"url":"http://patchwork.ozlabs.org/api/projects/17/?format=json","name":"GNU Compiler Collection","link_name":"gcc","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1505487594.26707.25.camel@brimstone.rchland.ibm.com>","list_archive_url":null,"date":"2017-09-15T14:59:54","name":"[rs6000,v3] Folding of vector loads in GIMPLE","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"97ba4351b27eb4495f359b78ca8dffa704f8c72a","submitter":{"id":3241,"url":"http://patchwork.ozlabs.org/api/people/3241/?format=json","name":"will schmidt","email":"will_schmidt@vnet.ibm.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/gcc/patch/1505487594.26707.25.camel@brimstone.rchland.ibm.com/mbox/","series":[{"id":3324,"url":"http://patchwork.ozlabs.org/api/series/3324/?format=json","web_url":"http://patchwork.ozlabs.org/project/gcc/list/?series=3324","date":"2017-09-15T14:59:54","name":"[rs6000,v3] Folding of vector loads in GIMPLE","version":3,"mbox":"http://patchwork.ozlabs.org/series/3324/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/814314/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/814314/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list gcc-patches@gcc.gnu.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=gcc-patches-return-462250-incoming=patchwork.ozlabs.org@gcc.gnu.org;\n\treceiver=)","ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org\n\theader.b=\"ObAo5bx4\"; dkim-atps=neutral","sourceware.org; auth=none"],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xtz9K26hjz9s7c\n\tfor ;\n\tSat, 16 Sep 2017 01:00:36 +1000 (AEST)","(qmail 123353 invoked by alias); 15 Sep 2017 15:00:27 -0000","(qmail 116575 invoked by uid 89); 15 Sep 2017 15:00:15 -0000","from mx0a-001b2d01.pphosted.com (HELO mx0a-001b2d01.pphosted.com)\n\t(148.163.156.1) by sourceware.org\n\t(qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP;\n\tFri, 15 Sep 2017 15:00:03 +0000","from pps.filterd (m0098396.ppops.net [127.0.0.1])\tby\n\tmx0a-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv8FExxXo016418\tfor ;\n\tFri, 15 Sep 2017 11:00:02 -0400","from e11.ny.us.ibm.com (e11.ny.us.ibm.com [129.33.205.201])\tby\n\tmx0a-001b2d01.pphosted.com with ESMTP id\n\t2d0gstgyyn-1\t(version=TLSv1.2 cipher=AES256-SHA bits=256\n\tverify=NOT)\tfor ;\n\tFri, 15 Sep 2017 11:00:01 -0400","from localhost\tby e11.ny.us.ibm.com with IBM ESMTP SMTP Gateway:\n\tAuthorized Use Only! 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Surrounding\ncomments have been adjusted slightly so they continue to read OK for the\nexisting vec_st code.\n \nThe resulting code is specifically verified by the powerpc/fold-vec-ld-*.c\ntests which are already in-tree.\n \nFor V2 of this patch, I've removed the chunk of code that prohibited the\ngimple fold from occurring in BE environments. This had fixed an issue\nfor me earlier during my development of the code, and turns out this was\nnot necessary. (this introduced a failure in LE environment, so V3...)\n\nfor V3 of this patch;\n I've added a reworked statement that prohibits the folding of a vector\nload when altivec=be is specified in an LE environment.\n Adjusted the arg1_type definition to use ptr_type_node per feedback and\ndiscussions and experimentation with generated code.\n\nRegtest to be run on power6 and newer.\n \nOK for trunk? (assuming successful completion of regtest).\n \nThanks,\n-Will\n \n[gcc]\n \n2017-09-15 Will Schmidt \n \n * config/rs6000/rs6000.c (rs6000_gimple_fold_builtin): Add handling\n for early folding of vector loads (ALTIVEC_BUILTIN_LVX_*).\n * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):\n Remove obsoleted code for handling ALTIVEC_BUILTIN_VEC_LD.","diff":"diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c\nindex d27f563..a49db97 100644\n--- a/gcc/config/rs6000/rs6000-c.c\n+++ b/gcc/config/rs6000/rs6000-c.c\n@@ -6470,89 +6470,19 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,\n \t\t convert (TREE_TYPE (stmt), arg0));\n stmt = build2 (COMPOUND_EXPR, arg1_type, stmt, decl);\n return stmt;\n }\n \n- /* Expand vec_ld into an expression that masks the address and\n- performs the load. We need to expand this early to allow\n+ /* Expand vec_st into an expression that masks the address and\n+ performs the store. We need to expand this early to allow\n the best aliasing, as by the time we get into RTL we no longer\n are able to honor __restrict__, for example. We may want to\n consider this for all memory access built-ins.\n \n When -maltivec=be is specified, or the wrong number of arguments\n is provided, simply punt to existing built-in processing. */\n- if (fcode == ALTIVEC_BUILTIN_VEC_LD\n- && (BYTES_BIG_ENDIAN || !VECTOR_ELT_ORDER_BIG)\n- && nargs == 2)\n- {\n- tree arg0 = (*arglist)[0];\n- tree arg1 = (*arglist)[1];\n-\n- /* Strip qualifiers like \"const\" from the pointer arg. */\n- tree arg1_type = TREE_TYPE (arg1);\n- if (TREE_CODE (arg1_type) == ARRAY_TYPE && c_dialect_cxx ())\n-\t{\n-\t /* Force array-to-pointer decay for C++. */\n-\t arg1 = default_conversion (arg1);\n-\t arg1_type = TREE_TYPE (arg1);\n-\t}\n- if (!POINTER_TYPE_P (arg1_type))\n-\tgoto bad;\n-\n- tree inner_type = TREE_TYPE (arg1_type);\n- if (TYPE_QUALS (TREE_TYPE (arg1_type)) != 0)\n-\t{\n-\t arg1_type = build_pointer_type (build_qualified_type (inner_type,\n-\t\t\t\t\t\t\t\t0));\n-\t arg1 = fold_convert (arg1_type, arg1);\n-\t}\n-\n- /* Construct the masked address. Let existing error handling take\n-\t over if we don't have a constant offset. */\n- arg0 = fold (arg0);\n-\n- if (TREE_CODE (arg0) == INTEGER_CST)\n-\t{\n-\t if (!ptrofftype_p (TREE_TYPE (arg0)))\n-\t arg0 = build1 (NOP_EXPR, sizetype, arg0);\n-\n-\t tree addr = fold_build2_loc (loc, POINTER_PLUS_EXPR, arg1_type,\n-\t\t\t\t arg1, arg0);\n-\t tree aligned = fold_build2_loc (loc, BIT_AND_EXPR, arg1_type, addr,\n-\t\t\t\t\t build_int_cst (arg1_type, -16));\n-\n-\t /* Find the built-in to get the return type so we can convert\n-\t the result properly (or fall back to default handling if the\n-\t arguments aren't compatible). */\n-\t for (desc = altivec_overloaded_builtins;\n-\t desc->code && desc->code != fcode; desc++)\n-\t continue;\n-\n-\t for (; desc->code == fcode; desc++)\n-\t if (rs6000_builtin_type_compatible (TREE_TYPE (arg0), desc->op1)\n-\t\t&& (rs6000_builtin_type_compatible (TREE_TYPE (arg1),\n-\t\t\t\t\t\t desc->op2)))\n-\t {\n-\t\ttree ret_type = rs6000_builtin_type (desc->ret_type);\n-\t\tif (TYPE_MODE (ret_type) == V2DImode)\n-\t\t /* Type-based aliasing analysis thinks vector long\n-\t\t and vector long long are different and will put them\n-\t\t in distinct alias classes. Force our return type\n-\t\t to be a may-alias type to avoid this. */\n-\t\t ret_type\n-\t\t = build_pointer_type_for_mode (ret_type, Pmode,\n-\t\t\t\t\t\t true/*can_alias_all*/);\n-\t\telse\n-\t\t ret_type = build_pointer_type (ret_type);\n-\t\taligned = build1 (NOP_EXPR, ret_type, aligned);\n-\t\ttree ret_val = build_indirect_ref (loc, aligned, RO_NULL);\n-\t\treturn ret_val;\n-\t }\n-\t}\n- }\n \n- /* Similarly for stvx. */\n if (fcode == ALTIVEC_BUILTIN_VEC_ST\n && (BYTES_BIG_ENDIAN || !VECTOR_ELT_ORDER_BIG)\n && nargs == 3)\n {\n tree arg0 = (*arglist)[0];\ndiff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c\nindex 1338371..89ee431 100644\n--- a/gcc/config/rs6000/rs6000.c\n+++ b/gcc/config/rs6000/rs6000.c\n@@ -16547,10 +16547,52 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)\n \tres = gimple_build (&stmts, VIEW_CONVERT_EXPR, TREE_TYPE (lhs), res);\n \tgsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT);\n \tupdate_call_from_tree (gsi, res);\n \treturn true;\n }\n+ /* Vector loads. */\n+ case ALTIVEC_BUILTIN_LVX_V16QI:\n+ case ALTIVEC_BUILTIN_LVX_V8HI:\n+ case ALTIVEC_BUILTIN_LVX_V4SI:\n+ case ALTIVEC_BUILTIN_LVX_V4SF:\n+ case ALTIVEC_BUILTIN_LVX_V2DI:\n+ case ALTIVEC_BUILTIN_LVX_V2DF:\n+ {\n+\t gimple *g;\n+\t arg0 = gimple_call_arg (stmt, 0); // offset\n+\t arg1 = gimple_call_arg (stmt, 1); // address\n+\t /* Do not fold for -maltivec=be on LE targets. */\n+\t if (VECTOR_ELT_ORDER_BIG && !BYTES_BIG_ENDIAN)\n+\t return false;\n+\t lhs = gimple_call_lhs (stmt);\n+\t location_t loc = gimple_location (stmt);\n+\t /* Since arg1 may be cast to a different type, just use ptr_type_node\n+\t here instead of trying to enforce TBAA on pointer types. */\n+\t tree arg1_type = ptr_type_node;\n+\t tree lhs_type = TREE_TYPE (lhs);\n+\t /* POINTER_PLUS_EXPR wants the offset to be of type 'sizetype'. Create\n+\t the tree using the value from arg0. The resulting type will match\n+\t the type of arg1. */\n+\t gimple_seq stmts = NULL;\n+\t tree temp_offset = gimple_convert (&stmts, loc, sizetype, arg0);\n+\t tree temp_addr = gimple_build (&stmts, loc, POINTER_PLUS_EXPR,\n+\t\t\t\t arg1_type, arg1, temp_offset);\n+\t /* Mask off any lower bits from the address. */\n+\t tree aligned_addr = gimple_build (&stmts, loc, BIT_AND_EXPR,\n+\t\t\t\t\t arg1_type, temp_addr,\n+\t\t\t\t\t build_int_cst (arg1_type, -16));\n+\t gsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT);\n+\t /* Use the build2 helper to set up the mem_ref. The MEM_REF could also\n+\t take an offset, but since we've already incorporated the offset\n+\t above, here we just pass in a zero. */\n+\t g = gimple_build_assign (lhs, build2 (MEM_REF, lhs_type, aligned_addr,\n+\t\t\t\t\t\tbuild_int_cst (arg1_type, 0)));\n+\t gimple_set_location (g, loc);\n+\t gsi_replace (gsi, g, true);\n+\t return true;\n+ }\n+\n default:\n \tif (TARGET_DEBUG_BUILTIN)\n \t fprintf (stderr, \"gimple builtin intrinsic not matched:%d %s %s\\n\",\n \t\t fn_code, fn_name1, fn_name2);\n break;\n","prefixes":["rs6000","v3"]}