{"id":814313,"url":"http://patchwork.ozlabs.org/api/patches/814313/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/patch/dc748e15f36db808f90b4f2393bc29ba7556a9f6.1505485574.git.alifm@linux.vnet.ibm.com/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"","list_archive_url":null,"date":"2017-09-15T14:40:31","name":"[v3,1/2] virtio-gpu: Handle endian conversion","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"aba875f300e1a248b142ea3f7cc9de761ffa3b9c","submitter":{"id":71051,"url":"http://patchwork.ozlabs.org/api/people/71051/?format=json","name":"Farhan Ali","email":"alifm@linux.vnet.ibm.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/dc748e15f36db808f90b4f2393bc29ba7556a9f6.1505485574.git.alifm@linux.vnet.ibm.com/mbox/","series":[{"id":3323,"url":"http://patchwork.ozlabs.org/api/series/3323/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=3323","date":"2017-09-15T14:40:30","name":"Virtio GPU for S390","version":3,"mbox":"http://patchwork.ozlabs.org/series/3323/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/814313/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/814313/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xtynG5v6pz9sNc\n\tfor ;\n\tSat, 16 Sep 2017 00:43:14 +1000 (AEST)","from localhost ([::1]:53637 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t)\n\tid 1dsrpo-0006Ga-Rm\n\tfor incoming@patchwork.ozlabs.org; Fri, 15 Sep 2017 10:43:12 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:36179)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from ) id 1dsrnO-0003s6-Ci\n\tfor qemu-devel@nongnu.org; Fri, 15 Sep 2017 10:40:43 -0400","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from ) id 1dsrnL-0003vL-8I\n\tfor qemu-devel@nongnu.org; Fri, 15 Sep 2017 10:40:42 -0400","from mx0b-001b2d01.pphosted.com ([148.163.158.5]:57248\n\thelo=mx0a-001b2d01.pphosted.com)\n\tby eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from )\n\tid 1dsrnL-0003v6-2s\n\tfor qemu-devel@nongnu.org; Fri, 15 Sep 2017 10:40:39 -0400","from pps.filterd (m0098413.ppops.net [127.0.0.1])\n\tby mx0b-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv8FEd2xY011032\n\tfor ; Fri, 15 Sep 2017 10:40:38 -0400","from e36.co.us.ibm.com (e36.co.us.ibm.com [32.97.110.154])\n\tby mx0b-001b2d01.pphosted.com with ESMTP id 2d0fxk2ryg-1\n\t(version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT)\n\tfor ; Fri, 15 Sep 2017 10:40:37 -0400","from localhost\n\tby e36.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use\n\tOnly! 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Violators will be prosecuted; \n\tFri, 15 Sep 2017 08:40:35 -0600","from b03ledav003.gho.boulder.ibm.com\n\t(b03ledav003.gho.boulder.ibm.com [9.17.130.234])\n\tby b03cxnp07029.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with\n\tESMTP id v8FEeZSQ8323442; Fri, 15 Sep 2017 07:40:35 -0700","from b03ledav003.gho.boulder.ibm.com (unknown [127.0.0.1])\n\tby IMSVA (Postfix) with ESMTP id A1A126A042;\n\tFri, 15 Sep 2017 08:40:34 -0600 (MDT)","from alifm-ThinkPad-W540.pok.ibm.com (unknown [9.56.58.52])\n\tby b03ledav003.gho.boulder.ibm.com (Postfix) with ESMTPS id\n\t056196A03C; Fri, 15 Sep 2017 08:40:33 -0600 (MDT)"],"From":"Farhan Ali ","To":"qemu-devel@nongnu.org","Date":"Fri, 15 Sep 2017 10:40:31 -0400","X-Mailer":"git-send-email 1.9.1","In-Reply-To":["",""],"References":["",""],"X-TM-AS-GCONF":"00","x-cbid":"17091514-0020-0000-0000-00000CB6FC02","X-IBM-SpamModules-Scores":"","X-IBM-SpamModules-Versions":"BY=3.00007743; HX=3.00000241; KW=3.00000007;\n\tPH=3.00000004; SC=3.00000229; SDB=6.00917417; UDB=6.00460785;\n\tIPR=6.00697644; \n\tBA=6.00005589; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009;\n\tZB=6.00000000; \n\tZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00017168;\n\tXFM=3.00000015; UTC=2017-09-15 14:40:37","X-IBM-AV-DETECTION":"SAVI=unused REMOTE=unused XFE=unused","x-cbparentid":"17091514-0021-0000-0000-00005E248511","Message-Id":"","X-Proofpoint-Virus-Version":"vendor=fsecure engine=2.50.10432:, ,\n\tdefinitions=2017-09-15_05:, , signatures=0","X-Proofpoint-Spam-Details":"rule=outbound_notspam policy=outbound score=0\n\tspamscore=0 suspectscore=1\n\tmalwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam\n\tadjust=0 reason=mlx scancount=1 engine=8.0.1-1707230000\n\tdefinitions=main-1709150214","X-detected-operating-system":"by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy]","X-Received-From":"148.163.158.5","Subject":"[Qemu-devel] [PATCH v3 1/2] virtio-gpu: Handle endian conversion","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"borntraeger@de.ibm.com, thuth@redhat.com, cohuck@redhat.com,\n\tpasic@linux.vnet.ibm.com, kraxel@redhat.com","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"},"content":"Virtio GPU code currently only supports litte endian format,\nand so using the Virtio GPU device on a big endian machine\ndoes not work.\n\nLet's fix it by supporting the correct host cpu byte order.\n\nSigned-off-by: Farhan Ali \n---\n hw/display/virtio-gpu.c | 70 +++++++++++++++++++++++++++++++++++++++++++------\n 1 file changed, 62 insertions(+), 8 deletions(-)","diff":"diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c\nindex 6aae147..0ef7e5c 100644\n--- a/hw/display/virtio-gpu.c\n+++ b/hw/display/virtio-gpu.c\n@@ -30,6 +30,48 @@ virtio_gpu_find_resource(VirtIOGPU *g, uint32_t resource_id);\n \n static void virtio_gpu_cleanup_mapping(struct virtio_gpu_simple_resource *res);\n \n+static void\n+virtio_gpu_ctrl_hdr_bswap(struct virtio_gpu_ctrl_hdr *hdr)\n+{\n+ le32_to_cpus(&hdr->type);\n+ le32_to_cpus(&hdr->flags);\n+ le64_to_cpus(&hdr->fence_id);\n+ le32_to_cpus(&hdr->ctx_id);\n+ le32_to_cpus(&hdr->padding);\n+}\n+\n+static void virtio_gpu_bswap_32(void *ptr,\n+ size_t size)\n+{\n+#ifdef HOST_WORDS_BIGENDIAN\n+\n+ size_t i;\n+ struct virtio_gpu_ctrl_hdr *hdr = (struct virtio_gpu_ctrl_hdr *) ptr;\n+\n+ virtio_gpu_ctrl_hdr_bswap(hdr);\n+\n+ i = sizeof(struct virtio_gpu_ctrl_hdr);\n+ while (i < size) {\n+ le32_to_cpus((uint32_t *)(ptr + i));\n+ i = i + sizeof(uint32_t);\n+ }\n+\n+#endif\n+}\n+\n+static void\n+virtio_gpu_t2d_bswap(struct virtio_gpu_transfer_to_host_2d *t2d)\n+{\n+ virtio_gpu_ctrl_hdr_bswap(&t2d->hdr);\n+ le32_to_cpus(&t2d->r.x);\n+ le32_to_cpus(&t2d->r.y);\n+ le32_to_cpus(&t2d->r.width);\n+ le32_to_cpus(&t2d->r.height);\n+ le64_to_cpus(&t2d->offset);\n+ le32_to_cpus(&t2d->resource_id);\n+ le32_to_cpus(&t2d->padding);\n+}\n+\n #ifdef CONFIG_VIRGL\n #include \n #define VIRGL(_g, _virgl, _simple, ...) \\\n@@ -205,6 +247,7 @@ void virtio_gpu_ctrl_response(VirtIOGPU *g,\n resp->fence_id = cmd->cmd_hdr.fence_id;\n resp->ctx_id = cmd->cmd_hdr.ctx_id;\n }\n+ virtio_gpu_ctrl_hdr_bswap(resp);\n s = iov_from_buf(cmd->elem.in_sg, cmd->elem.in_num, 0, resp, resp_len);\n if (s != resp_len) {\n qemu_log_mask(LOG_GUEST_ERROR,\n@@ -236,8 +279,8 @@ virtio_gpu_fill_display_info(VirtIOGPU *g,\n for (i = 0; i < g->conf.max_outputs; i++) {\n if (g->enabled_output_bitmask & (1 << i)) {\n dpy_info->pmodes[i].enabled = 1;\n- dpy_info->pmodes[i].r.width = g->req_state[i].width;\n- dpy_info->pmodes[i].r.height = g->req_state[i].height;\n+ dpy_info->pmodes[i].r.width = cpu_to_le32(g->req_state[i].width);\n+ dpy_info->pmodes[i].r.height = cpu_to_le32(g->req_state[i].height);\n }\n }\n }\n@@ -287,6 +330,7 @@ static void virtio_gpu_resource_create_2d(VirtIOGPU *g,\n struct virtio_gpu_resource_create_2d c2d;\n \n VIRTIO_GPU_FILL_CMD(c2d);\n+ virtio_gpu_bswap_32(&c2d, sizeof(c2d));\n trace_virtio_gpu_cmd_res_create_2d(c2d.resource_id, c2d.format,\n c2d.width, c2d.height);\n \n@@ -360,6 +404,7 @@ static void virtio_gpu_resource_unref(VirtIOGPU *g,\n struct virtio_gpu_resource_unref unref;\n \n VIRTIO_GPU_FILL_CMD(unref);\n+ virtio_gpu_bswap_32(&unref, sizeof(unref));\n trace_virtio_gpu_cmd_res_unref(unref.resource_id);\n \n res = virtio_gpu_find_resource(g, unref.resource_id);\n@@ -383,6 +428,7 @@ static void virtio_gpu_transfer_to_host_2d(VirtIOGPU *g,\n struct virtio_gpu_transfer_to_host_2d t2d;\n \n VIRTIO_GPU_FILL_CMD(t2d);\n+ virtio_gpu_t2d_bswap(&t2d);\n trace_virtio_gpu_cmd_res_xfer_toh_2d(t2d.resource_id);\n \n res = virtio_gpu_find_resource(g, t2d.resource_id);\n@@ -439,6 +485,7 @@ static void virtio_gpu_resource_flush(VirtIOGPU *g,\n int i;\n \n VIRTIO_GPU_FILL_CMD(rf);\n+ virtio_gpu_bswap_32(&rf, sizeof(rf));\n trace_virtio_gpu_cmd_res_flush(rf.resource_id,\n rf.r.width, rf.r.height, rf.r.x, rf.r.y);\n \n@@ -511,6 +558,7 @@ static void virtio_gpu_set_scanout(VirtIOGPU *g,\n struct virtio_gpu_set_scanout ss;\n \n VIRTIO_GPU_FILL_CMD(ss);\n+ virtio_gpu_bswap_32(&ss, sizeof(ss));\n trace_virtio_gpu_cmd_set_scanout(ss.scanout_id, ss.resource_id,\n ss.r.width, ss.r.height, ss.r.x, ss.r.y);\n \n@@ -633,13 +681,15 @@ int virtio_gpu_create_mapping_iov(struct virtio_gpu_resource_attach_backing *ab,\n *addr = g_malloc0(sizeof(uint64_t) * ab->nr_entries);\n }\n for (i = 0; i < ab->nr_entries; i++) {\n- hwaddr len = ents[i].length;\n- (*iov)[i].iov_len = ents[i].length;\n- (*iov)[i].iov_base = cpu_physical_memory_map(ents[i].addr, &len, 1);\n+ uint64_t a = le64_to_cpu(ents[i].addr);\n+ uint32_t l = le32_to_cpu(ents[i].length);\n+ hwaddr len = l;\n+ (*iov)[i].iov_len = l;\n+ (*iov)[i].iov_base = cpu_physical_memory_map(a, &len, 1);\n if (addr) {\n- (*addr)[i] = ents[i].addr;\n+ (*addr)[i] = a;\n }\n- if (!(*iov)[i].iov_base || len != ents[i].length) {\n+ if (!(*iov)[i].iov_base || len != l) {\n qemu_log_mask(LOG_GUEST_ERROR, \"%s: failed to map MMIO memory for\"\n \" resource %d element %d\\n\",\n __func__, ab->resource_id, i);\n@@ -686,6 +736,7 @@ virtio_gpu_resource_attach_backing(VirtIOGPU *g,\n int ret;\n \n VIRTIO_GPU_FILL_CMD(ab);\n+ virtio_gpu_bswap_32(&ab, sizeof(ab));\n trace_virtio_gpu_cmd_res_back_attach(ab.resource_id);\n \n res = virtio_gpu_find_resource(g, ab.resource_id);\n@@ -718,6 +769,7 @@ virtio_gpu_resource_detach_backing(VirtIOGPU *g,\n struct virtio_gpu_resource_detach_backing detach;\n \n VIRTIO_GPU_FILL_CMD(detach);\n+ virtio_gpu_bswap_32(&detach, sizeof(detach));\n trace_virtio_gpu_cmd_res_back_detach(detach.resource_id);\n \n res = virtio_gpu_find_resource(g, detach.resource_id);\n@@ -734,6 +786,7 @@ static void virtio_gpu_simple_process_cmd(VirtIOGPU *g,\n struct virtio_gpu_ctrl_command *cmd)\n {\n VIRTIO_GPU_FILL_CMD(cmd->cmd_hdr);\n+ virtio_gpu_ctrl_hdr_bswap(&cmd->cmd_hdr);\n \n switch (cmd->cmd_hdr.type) {\n case VIRTIO_GPU_CMD_GET_DISPLAY_INFO:\n@@ -879,6 +932,7 @@ static void virtio_gpu_handle_cursor(VirtIODevice *vdev, VirtQueue *vq)\n \"%s: cursor size incorrect %zu vs %zu\\n\",\n __func__, s, sizeof(cursor_info));\n } else {\n+ virtio_gpu_bswap_32(&cursor_info, sizeof(cursor_info));\n update_cursor(g, &cursor_info);\n }\n virtqueue_push(vq, elem, 0);\n@@ -1135,7 +1189,7 @@ static void virtio_gpu_device_realize(DeviceState *qdev, Error **errp)\n }\n \n g->config_size = sizeof(struct virtio_gpu_config);\n- g->virtio_config.num_scanouts = g->conf.max_outputs;\n+ g->virtio_config.num_scanouts = cpu_to_le32(g->conf.max_outputs);\n virtio_init(VIRTIO_DEVICE(g), \"virtio-gpu\", VIRTIO_ID_GPU,\n g->config_size);\n \n","prefixes":["v3","1/2"]}