{"id":813863,"url":"http://patchwork.ozlabs.org/api/patches/813863/?format=json","web_url":"http://patchwork.ozlabs.org/project/devicetree-bindings/patch/20170914145251.21784-2-icenowy@aosc.io/","project":{"id":37,"url":"http://patchwork.ozlabs.org/api/projects/37/?format=json","name":"Devicetree Bindings","link_name":"devicetree-bindings","list_id":"devicetree.vger.kernel.org","list_email":"devicetree@vger.kernel.org","web_url":"","scm_url":"","webscm_url":"","list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<20170914145251.21784-2-icenowy@aosc.io>","list_archive_url":null,"date":"2017-09-14T14:52:46","name":"[v4,1/6] dt-bindings: update the Allwinner GPADC device tree binding for H3","commit_ref":null,"pull_url":null,"state":"changes-requested","archived":true,"hash":"aa8bea0748a6992c7f1fc773ecc089f1d10ea165","submitter":{"id":71295,"url":"http://patchwork.ozlabs.org/api/people/71295/?format=json","name":"Icenowy Zheng","email":"icenowy@aosc.io"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/devicetree-bindings/patch/20170914145251.21784-2-icenowy@aosc.io/mbox/","series":[{"id":3118,"url":"http://patchwork.ozlabs.org/api/series/3118/?format=json","web_url":"http://patchwork.ozlabs.org/project/devicetree-bindings/list/?series=3118","date":"2017-09-14T14:52:46","name":"IIO-based thermal sensor driver for Allwinner H3 SoC","version":4,"mbox":"http://patchwork.ozlabs.org/series/3118/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/813863/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/813863/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xtM5X0Sw3z9sRm\n\tfor ;\n\tFri, 15 Sep 2017 00:55:12 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751639AbdINOx1 (ORCPT\n\t);\n\tThu, 14 Sep 2017 10:53:27 -0400","from hermes.aosc.io ([199.195.250.187]:60845 \"EHLO hermes.aosc.io\"\n\trhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP\n\tid S1751451AbdINOx0 (ORCPT );\n\tThu, 14 Sep 2017 10:53:26 -0400","from localhost (localhost [127.0.0.1]) (Authenticated sender:\n\ticenowy@aosc.io)\n\tby hermes.aosc.io (Postfix) with ESMTPSA id C0B2F473EB;\n\tThu, 14 Sep 2017 14:53:19 +0000 (UTC)"],"From":"Icenowy Zheng ","To":"Lee Jones , Rob Herring ,\n\tMaxime Ripard ,\n\tChen-Yu Tsai , Jonathan Cameron ,\n\tQuentin Schulz ","Cc":"devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,\n\tlinux-kernel@vger.kernel.org, linux-iio@vger.kernel.org,\n\tlinux-sunxi@googlegroups.com, Icenowy Zheng ","Subject":"[PATCH v4 1/6] dt-bindings: update the Allwinner GPADC device tree\n\tbinding for H3","Date":"Thu, 14 Sep 2017 22:52:46 +0800","Message-Id":"<20170914145251.21784-2-icenowy@aosc.io>","In-Reply-To":"<20170914145251.21784-1-icenowy@aosc.io>","References":"<20170914145251.21784-1-icenowy@aosc.io>","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"},"content":"Allwinner H3 features a thermal sensor like the one in A33, but has its\nregister re-arranged, the clock divider moved to CCU (originally the\nclock divider is in ADC) and added a pair of bus clock and reset.\n\nUpdate the binding document to cover H3.\n\nSigned-off-by: Icenowy Zheng \nReviewed-by: Chen-Yu Tsai \n---\nChanges in v4:\n- Add nvmem calibration data (not yet used by the driver)\nChanges in v3:\n- Clock name changes.\n- Example node name changes.\n- Add interupts (not yet used by the driver).\n\n .../devicetree/bindings/mfd/sun4i-gpadc.txt | 30 ++++++++++++++++++++--\n 1 file changed, 28 insertions(+), 2 deletions(-)","diff":"diff --git a/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt b/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt\nindex badff3611a98..6c470d584bf9 100644\n--- a/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt\n+++ b/Documentation/devicetree/bindings/mfd/sun4i-gpadc.txt\n@@ -4,12 +4,26 @@ The Allwinner SoCs all have an ADC that can also act as a thermal sensor\n and sometimes as a touchscreen controller.\n \n Required properties:\n- - compatible: \"allwinner,sun8i-a33-ths\",\n+ - compatible: must contain one of the following compatibles:\n+\t\t- \"allwinner,sun8i-a33-ths\"\n+\t\t- \"allwinner,sun8i-h3-ths\"\n - reg: mmio address range of the chip,\n - #thermal-sensor-cells: shall be 0,\n - #io-channel-cells: shall be 0,\n \n-Example:\n+Optional properties:\n+ - nvmem-cells: A phandle to the calibration data provided by a nvmem device.\n+ If unspecified default values shall be used.\n+ - nvmem-cell-names: Should be \"calibration-data\"\n+\n+Required properties for the following compatibles:\n+\t\t- \"allwinner,sun8i-h3-ths\"\n+ - clocks: the bus clock and the input clock of the ADC,\n+ - clock-names: should be \"bus\" and \"mod\",\n+ - resets: the bus reset of the ADC,\n+ - interrupts: the sampling interrupt of the ADC,\n+\n+Example for A33:\n \tths: ths@01c25000 {\n \t\tcompatible = \"allwinner,sun8i-a33-ths\";\n \t\treg = <0x01c25000 0x100>;\n@@ -17,6 +31,18 @@ Example:\n \t\t#io-channel-cells = <0>;\n \t};\n \n+Example for H3:\n+\tths: thermal-sensor@1c25000 {\n+\t\tcompatible = \"allwinner,sun8i-h3-ths\";\n+\t\treg = <0x01c25000 0x400>;\n+\t\tclocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>;\n+\t\tclock-names = \"bus\", \"mod\";\n+\t\tresets = <&ccu RST_BUS_THS>;\n+\t\tinterrupts = ;\n+\t\t#thermal-sensor-cells = <0>;\n+\t\t#io-channel-cells = <0>;\n+\t};\n+\n sun4i, sun5i and sun6i SoCs are also supported via the older binding:\n \n sun4i resistive touchscreen controller\n","prefixes":["v4","1/6"]}