{"id":813142,"url":"http://patchwork.ozlabs.org/api/patches/813142/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/patch/1505267699-10017-1-git-send-email-uboot@andestech.com/","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null,"list_archive_url":"","list_archive_url_format":"","commit_url_format":""},"msgid":"<1505267699-10017-1-git-send-email-uboot@andestech.com>","list_archive_url":null,"date":"2017-09-13T01:54:59","name":"[U-Boot,3/3] nds32: ftmac100: Fix write mac addr fail problem.","commit_ref":"1341494c7db46f4e4db59f7bb797c9ab79f4c51b","pull_url":null,"state":"accepted","archived":false,"hash":"97eed98483183827eb25bcd70426a1d958b7e7cb","submitter":{"id":28639,"url":"http://patchwork.ozlabs.org/api/people/28639/?format=json","name":"Andes","email":"uboot@andestech.com"},"delegate":{"id":20174,"url":"http://patchwork.ozlabs.org/api/users/20174/?format=json","username":"Andes","first_name":"Andes","last_name":"","email":"uboot@andestech.com"},"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/1505267699-10017-1-git-send-email-uboot@andestech.com/mbox/","series":[{"id":2798,"url":"http://patchwork.ozlabs.org/api/series/2798/?format=json","web_url":"http://patchwork.ozlabs.org/project/uboot/list/?series=2798","date":"2017-09-13T01:53:42","name":"[U-Boot,1/3] nds32: ftmac100: support cache enable.","version":1,"mbox":"http://patchwork.ozlabs.org/series/2798/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/patches/813142/comments/","check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/813142/checks/","tags":{},"related":[],"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; helo=lists.denx.de;\n\tenvelope-from=u-boot-bounces@lists.denx.de;\n\treceiver=)","Received":["from lists.denx.de (dione.denx.de [81.169.180.215])\n\tby ozlabs.org (Postfix) with ESMTP id 3xsQSt2WgZz9sNr\n\tfor ;\n\tWed, 13 Sep 2017 12:23:41 +1000 (AEST)","by lists.denx.de (Postfix, from userid 105)\n\tid C4AB1C2206F; Wed, 13 Sep 2017 02:20:37 +0000 (UTC)","from lists.denx.de (localhost [IPv6:::1])\n\tby lists.denx.de (Postfix) with ESMTP id 16430C22115;\n\tWed, 13 Sep 2017 02:20:36 +0000 (UTC)","by lists.denx.de (Postfix, from userid 105)\n\tid 4819AC22243; Wed, 13 Sep 2017 02:18:54 +0000 (UTC)","from ATCSQR.andestech.com (exmail.andestech.com [59.124.169.137])\n\tby lists.denx.de (Postfix) with ESMTPS id 219C7C22304\n\tfor ; Wed, 13 Sep 2017 02:18:50 +0000 (UTC)","from mail.andestech.com (atcpcs16.andestech.com [10.0.1.222])\n\tby ATCSQR.andestech.com with ESMTP id v8D2CtUr033225;\n\tWed, 13 Sep 2017 10:12:55 +0800 (GMT-8)\n\t(envelope-from uboot@andestech.com)","from app09.andestech.com (10.0.4.97) by ATCPCS16.andestech.com\n\t(10.0.1.222) with Microsoft SMTP Server id 14.3.123.3;\n\tWed, 13 Sep 2017 10:18:29 +0800"],"X-Spam-Checker-Version":"SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=0.0 required=5.0 tests=none autolearn=unavailable\n\tautolearn_force=no version=3.4.0","From":"Andes ","To":", , ","Date":"Wed, 13 Sep 2017 09:54:59 +0800","Message-ID":"<1505267699-10017-1-git-send-email-uboot@andestech.com>","X-Mailer":"git-send-email 1.7.9.5","MIME-Version":"1.0","X-Originating-IP":"[10.0.4.97]","X-DNSRBL":"","X-MAIL":"ATCSQR.andestech.com v8D2CtUr033225","Subject":"[U-Boot] [PATCH 3/3] nds32: ftmac100: Fix write mac addr fail\n\tproblem.","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "},"content":"From: rick \n\nAfter soft reset complete, write mac address immediately will fail.\nAdd delay to work around this problem.\n\nSigned-off-by: rick \n---\n drivers/net/ftmac100.c | 7 ++++++-\n 1 file changed, 6 insertions(+), 1 deletion(-)","diff":"diff --git a/drivers/net/ftmac100.c b/drivers/net/ftmac100.c\nindex 4e45f00..e64bf3d 100644\n--- a/drivers/net/ftmac100.c\n+++ b/drivers/net/ftmac100.c\n@@ -40,7 +40,12 @@ static void ftmac100_reset(struct ftmac100_data *priv)\n \twritel (FTMAC100_MACCR_SW_RST, &ftmac100->maccr);\n \n \twhile (readl (&ftmac100->maccr) & FTMAC100_MACCR_SW_RST)\n-\t\t;\n+\t\tmdelay(1);\n+\t/*\n+\t * When soft reset complete, write mac address immediately maybe fail somehow\n+\t * Wait for a while can avoid this problem\n+\t */\n+\tmdelay(1);\n }\n \n /*\n","prefixes":["U-Boot","3/3"]}